A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications

C. H. Lin, H. Z. Liu, H. K. Huang, C. K. Chu, M. P. Houng, Y. H. Wang, C. C. Liu, C. H. Chang, C. L. Wu, C. S. Chang

研究成果: Conference contribution

摘要

A single supply, fully matched high linearity 2W power amplifier utilizing the gate zero-bias power PHEMT technology is developed for 5.8GHz WLAN applications. At Vgs= 0 V, Vds=5 V, the power amplifier with 33dBm of peak P1dB, 25% of PAE, 12.8dB small-signal gain can be seen. Moreover, high-linearity with 43dBm third-order intercept point at a single carrier output power level of 23dBm is also achieved.

原文English
主出版物標題2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
發行者Institute of Electrical and Electronics Engineers Inc.
頁面191-194
頁數4
ISBN(列印)0780393392, 9780780393394
DOIs
出版狀態Published - 2005 一月 1
事件2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong
持續時間: 2005 十二月 192005 十二月 21

出版系列

名字2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Other

Other2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
國家Hong Kong
城市Howloon
期間05-12-1905-12-21

    指紋

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

引用此

Lin, C. H., Liu, H. Z., Huang, H. K., Chu, C. K., Houng, M. P., Wang, Y. H., Liu, C. C., Chang, C. H., Wu, C. L., & Chang, C. S. (2005). A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications. 於 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (頁 191-194). [1635238] (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635238