A steep subthreshold swing technique for gate-all-around SOI MOSFETs

C. Y. Chen, J. T. Lin, Meng-Hsueh Chiang, Wei-Chou Hsu

研究成果: Conference contribution

摘要

A device design technique for silicon nanowire MOSFETs for low power capability beyond 10 nm technology node is demonstrated using 3D numerical simulation and physical analysis. The subthreshold kink effect enables the use of low supply bias without compromising performance. The kink-assisted methodology overcomes the fundamental and thermal voltage-limited subthreshold swing (SS).

原文English
主出版物標題Advanced CMOS-Compatible Semiconductor Devices 17
編輯S. Selberherr, Y. Omura, J. A. Martino, J. P. Raskin, H. Ishii, F. Gamiz, B. Y. Nguyen
發行者Electrochemical Society Inc.
頁面87-92
頁數6
版本5
ISBN(電子)9781607685395
DOIs
出版狀態Published - 2015 一月 1
事件Symposium on Advanced CMOS-Compatible Semiconductor Devices 17 - 227th ECS Meeting - Chicago, United States
持續時間: 2015 五月 242015 五月 28

出版系列

名字ECS Transactions
號碼5
66
ISSN(列印)1938-5862
ISSN(電子)1938-6737

Other

OtherSymposium on Advanced CMOS-Compatible Semiconductor Devices 17 - 227th ECS Meeting
國家United States
城市Chicago
期間15-05-2415-05-28

指紋

Nanowires
Silicon
Computer simulation
Electric potential
Hot Temperature

All Science Journal Classification (ASJC) codes

  • Engineering(all)

引用此文

Chen, C. Y., Lin, J. T., Chiang, M-H., & Hsu, W-C. (2015). A steep subthreshold swing technique for gate-all-around SOI MOSFETs. 於 S. Selberherr, Y. Omura, J. A. Martino, J. P. Raskin, H. Ishii, F. Gamiz, & B. Y. Nguyen (編輯), Advanced CMOS-Compatible Semiconductor Devices 17 (5 編輯, 頁 87-92). (ECS Transactions; 卷 66, 編號 5). Electrochemical Society Inc.. https://doi.org/10.1149/06605.0087ecst
Chen, C. Y. ; Lin, J. T. ; Chiang, Meng-Hsueh ; Hsu, Wei-Chou. / A steep subthreshold swing technique for gate-all-around SOI MOSFETs. Advanced CMOS-Compatible Semiconductor Devices 17. 編輯 / S. Selberherr ; Y. Omura ; J. A. Martino ; J. P. Raskin ; H. Ishii ; F. Gamiz ; B. Y. Nguyen. 5. 編輯 Electrochemical Society Inc., 2015. 頁 87-92 (ECS Transactions; 5).
@inproceedings{c15e76122b3c49979cf7de440a119d3b,
title = "A steep subthreshold swing technique for gate-all-around SOI MOSFETs",
abstract = "A device design technique for silicon nanowire MOSFETs for low power capability beyond 10 nm technology node is demonstrated using 3D numerical simulation and physical analysis. The subthreshold kink effect enables the use of low supply bias without compromising performance. The kink-assisted methodology overcomes the fundamental and thermal voltage-limited subthreshold swing (SS).",
author = "Chen, {C. Y.} and Lin, {J. T.} and Meng-Hsueh Chiang and Wei-Chou Hsu",
year = "2015",
month = "1",
day = "1",
doi = "10.1149/06605.0087ecst",
language = "English",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "5",
pages = "87--92",
editor = "S. Selberherr and Y. Omura and Martino, {J. A.} and Raskin, {J. P.} and H. Ishii and F. Gamiz and Nguyen, {B. Y.}",
booktitle = "Advanced CMOS-Compatible Semiconductor Devices 17",
edition = "5",

}

Chen, CY, Lin, JT, Chiang, M-H & Hsu, W-C 2015, A steep subthreshold swing technique for gate-all-around SOI MOSFETs. 於 S Selberherr, Y Omura, JA Martino, JP Raskin, H Ishii, F Gamiz & BY Nguyen (編輯), Advanced CMOS-Compatible Semiconductor Devices 17. 5 edn, ECS Transactions, 編號 5, 卷 66, Electrochemical Society Inc., 頁 87-92, Symposium on Advanced CMOS-Compatible Semiconductor Devices 17 - 227th ECS Meeting, Chicago, United States, 15-05-24. https://doi.org/10.1149/06605.0087ecst

A steep subthreshold swing technique for gate-all-around SOI MOSFETs. / Chen, C. Y.; Lin, J. T.; Chiang, Meng-Hsueh; Hsu, Wei-Chou.

Advanced CMOS-Compatible Semiconductor Devices 17. 編輯 / S. Selberherr; Y. Omura; J. A. Martino; J. P. Raskin; H. Ishii; F. Gamiz; B. Y. Nguyen. 5. 編輯 Electrochemical Society Inc., 2015. p. 87-92 (ECS Transactions; 卷 66, 編號 5).

研究成果: Conference contribution

TY - GEN

T1 - A steep subthreshold swing technique for gate-all-around SOI MOSFETs

AU - Chen, C. Y.

AU - Lin, J. T.

AU - Chiang, Meng-Hsueh

AU - Hsu, Wei-Chou

PY - 2015/1/1

Y1 - 2015/1/1

N2 - A device design technique for silicon nanowire MOSFETs for low power capability beyond 10 nm technology node is demonstrated using 3D numerical simulation and physical analysis. The subthreshold kink effect enables the use of low supply bias without compromising performance. The kink-assisted methodology overcomes the fundamental and thermal voltage-limited subthreshold swing (SS).

AB - A device design technique for silicon nanowire MOSFETs for low power capability beyond 10 nm technology node is demonstrated using 3D numerical simulation and physical analysis. The subthreshold kink effect enables the use of low supply bias without compromising performance. The kink-assisted methodology overcomes the fundamental and thermal voltage-limited subthreshold swing (SS).

UR - http://www.scopus.com/inward/record.url?scp=84931414733&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84931414733&partnerID=8YFLogxK

U2 - 10.1149/06605.0087ecst

DO - 10.1149/06605.0087ecst

M3 - Conference contribution

AN - SCOPUS:84931414733

T3 - ECS Transactions

SP - 87

EP - 92

BT - Advanced CMOS-Compatible Semiconductor Devices 17

A2 - Selberherr, S.

A2 - Omura, Y.

A2 - Martino, J. A.

A2 - Raskin, J. P.

A2 - Ishii, H.

A2 - Gamiz, F.

A2 - Nguyen, B. Y.

PB - Electrochemical Society Inc.

ER -

Chen CY, Lin JT, Chiang M-H, Hsu W-C. A steep subthreshold swing technique for gate-all-around SOI MOSFETs. 於 Selberherr S, Omura Y, Martino JA, Raskin JP, Ishii H, Gamiz F, Nguyen BY, 編輯, Advanced CMOS-Compatible Semiconductor Devices 17. 5 編輯 Electrochemical Society Inc. 2015. p. 87-92. (ECS Transactions; 5). https://doi.org/10.1149/06605.0087ecst