TY - JOUR
T1 - Adaptive MRAM Write and Read with MTJ Variation Monitor
AU - Wang, Shaodi
AU - Lee, Hochul
AU - Grezes, Cecile
AU - Amiri, Pedram Khalili
AU - Wang, Kang L.
AU - Gupta, Puneet
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2021/1/1
Y1 - 2021/1/1
N2 - Temperature and wafer-level process variations significantly degrade operation efficiency of Spin-transfer torque random access memory (STT-MRAM) and magnetoelectric random access memory (MeRAM), where the write and read reliability issues are exacerbated by the variations. We propose adaptive write and read schemes for highly efficient STT-MRAM and MeRAM programming and sensing that optimally selects write and read pulses to overcome process and temperature variation. With adaptive write, the write latency of STT-MRAM and MeRAM cache are reduced by up to 17 and 59 percent respectively, and application run time is improved by up to 41 percent. With adaptive read, the sensing margin is dramatically improved by 1.4X while maintaining read disturbance correctable by error-correcting-code (ECC) correction. To further mitigate read disturbance impact on memory system, additional adaptive read scheme can dynamically lower read voltage according to the proposed monitor result. It can extend memory service time by haft to one year, and reduce read disturbance induced memory failure by 59 to 84 percent. To better support these schemes, we also propose, design, and evaluate low-cost MTJ-based variation monitor, which precisely senses process and temperature variation. The monitor is over 10X faster, 5X more energy-efficient, and 20X smaller compared with conventional thermal monitors of similar accuracy.
AB - Temperature and wafer-level process variations significantly degrade operation efficiency of Spin-transfer torque random access memory (STT-MRAM) and magnetoelectric random access memory (MeRAM), where the write and read reliability issues are exacerbated by the variations. We propose adaptive write and read schemes for highly efficient STT-MRAM and MeRAM programming and sensing that optimally selects write and read pulses to overcome process and temperature variation. With adaptive write, the write latency of STT-MRAM and MeRAM cache are reduced by up to 17 and 59 percent respectively, and application run time is improved by up to 41 percent. With adaptive read, the sensing margin is dramatically improved by 1.4X while maintaining read disturbance correctable by error-correcting-code (ECC) correction. To further mitigate read disturbance impact on memory system, additional adaptive read scheme can dynamically lower read voltage according to the proposed monitor result. It can extend memory service time by haft to one year, and reduce read disturbance induced memory failure by 59 to 84 percent. To better support these schemes, we also propose, design, and evaluate low-cost MTJ-based variation monitor, which precisely senses process and temperature variation. The monitor is over 10X faster, 5X more energy-efficient, and 20X smaller compared with conventional thermal monitors of similar accuracy.
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U2 - 10.1109/TETC.2018.2866289
DO - 10.1109/TETC.2018.2866289
M3 - Article
AN - SCOPUS:85051785334
SN - 2168-6750
VL - 9
SP - 402
EP - 413
JO - IEEE Transactions on Emerging Topics in Computing
JF - IEEE Transactions on Emerging Topics in Computing
IS - 1
M1 - 8440727
ER -