Advances in selective etching for nano scale salicide fabrication

Ming Mao Chu; Jung Hua Chou

doi:10.1109/NMDC.2009.5167528

Advances in selective etching for nano scale salicide fabrication

Ming Mao Chu, Jung Hua Chou

工程科學系

研究成果: Conference contribution

1 引文斯高帕斯（Scopus）

摘要

High temperature SPM based wet selective processing for multi-step NiPt silicide process on nanoscale CMOS structure with dual gate dense layout has been studied. The high temperature SPM process is found to have better etching selectivity between NiPt/TiN and nickel rich silicide (Ni2Si/Ni3Si2) and results in better sheet resistance (Rs) and uniformity compare to HCL based process. The high temperature SPM process window is effective for Pt and induces very low material loss. Thus, it is a better selective etching process for multi-step silicide process that can scale with the CMOS technology toward 22nm node.

原文	English
主出版物標題	2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009
頁面	162-165
頁數	4
DOIs	https://doi.org/10.1109/NMDC.2009.5167528
出版狀態	Published - 2009
事件	2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009 - Traverse City, MI, United States 持續時間: 2009 6月 2 → 2009 6月 5

出版系列

名字	2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009

Other

Other	2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009
國家/地區	United States
城市	Traverse City, MI
期間	09-06-02 → 09-06-05

All Science Journal Classification (ASJC) codes

電氣與電子工程
電子、光磁材料

存取文件

10.1109/NMDC.2009.5167528

其它文件與鏈接

引用此

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title = "Advances in selective etching for nano scale salicide fabrication",

abstract = "High temperature SPM based wet selective processing for multi-step NiPt silicide process on nanoscale CMOS structure with dual gate dense layout has been studied. The high temperature SPM process is found to have better etching selectivity between NiPt/TiN and nickel rich silicide (Ni2Si/Ni3Si2) and results in better sheet resistance (Rs) and uniformity compare to HCL based process. The high temperature SPM process window is effective for Pt and induces very low material loss. Thus, it is a better selective etching process for multi-step silicide process that can scale with the CMOS technology toward 22nm node.",

author = "Chu, {Ming Mao} and Chou, {Jung Hua}",

year = "2009",

doi = "10.1109/NMDC.2009.5167528",

language = "English",

isbn = "9781424446964",

series = "2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009",

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note = "2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009 ; Conference date: 02-06-2009 Through 05-06-2009",

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Chu, MM & Chou, JH 2009, Advances in selective etching for nano scale salicide fabrication. 於 2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009., 5167528, 2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009, 頁 162-165, 2009 IEEE Nanotechnology Materials and Devices Conference, NMDC 2009, Traverse City, MI, United States, 09-06-02. https://doi.org/10.1109/NMDC.2009.5167528

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N2 - High temperature SPM based wet selective processing for multi-step NiPt silicide process on nanoscale CMOS structure with dual gate dense layout has been studied. The high temperature SPM process is found to have better etching selectivity between NiPt/TiN and nickel rich silicide (Ni2Si/Ni3Si2) and results in better sheet resistance (Rs) and uniformity compare to HCL based process. The high temperature SPM process window is effective for Pt and induces very low material loss. Thus, it is a better selective etching process for multi-step silicide process that can scale with the CMOS technology toward 22nm node.

AB - High temperature SPM based wet selective processing for multi-step NiPt silicide process on nanoscale CMOS structure with dual gate dense layout has been studied. The high temperature SPM process is found to have better etching selectivity between NiPt/TiN and nickel rich silicide (Ni2Si/Ni3Si2) and results in better sheet resistance (Rs) and uniformity compare to HCL based process. The high temperature SPM process window is effective for Pt and induces very low material loss. Thus, it is a better selective etching process for multi-step silicide process that can scale with the CMOS technology toward 22nm node.

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ER -

Advances in selective etching for nano scale salicide fabrication

摘要

出版系列

Other

All Science Journal Classification (ASJC) codes

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