An 8-bit 1.5Gs/s subranging ADC with level-shift operation and calibration techniques

Chung Ming Yang, Tai Haur Kuo

研究成果: Conference contribution

摘要

This work presents a high-speed low-power subranging analog-to-digital converter (ADC). The prototype achieves a subranging operation with a level-shift operation technique, which has a higher speed compared with the conventional subranging architecture. A background calibration is proposed to overcome the non-idealities from the level-shift circuit. With the above techniques, an 8-bit 1.5GS/s subranging ADC is implemented in 90nm CMOS technology and the active area occupies 0.192mm2. With the post-layout simulation, the ADC consumes 17mW at 1.5GS/s from a 1V supply and the signal-to-noise-and-distortion ratio (SNDR) is 45.6dB with Nyquist frequency input. The ADC has a Walden Figure-of-Merit (FOMW) of 72.8fJ/conv-step, which is comparable to prior state-of-the-art 8-bit high-speed ADCs. Furthermore, this ADC achieves the highest operation speed compared with the subranging ADCs.

原文English
主出版物標題Proceedings - 2020 International Symposium on Computer, Consumer and Control, IS3C 2020
發行者Institute of Electrical and Electronics Engineers Inc.
頁面232-235
頁數4
ISBN(電子)9781728193625
DOIs
出版狀態Published - 2020 十一月
事件2020 International Symposium on Computer, Consumer and Control, IS3C 2020 - Taichung, Taiwan
持續時間: 2020 十一月 132020 十一月 16

出版系列

名字Proceedings - 2020 International Symposium on Computer, Consumer and Control, IS3C 2020

Conference

Conference2020 International Symposium on Computer, Consumer and Control, IS3C 2020
國家/地區Taiwan
城市Taichung
期間20-11-1320-11-16

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程
  • 控制和優化
  • 儀器
  • 原子與分子物理與光學
  • 電腦科學應用
  • 能源工程與電力技術
  • 人工智慧

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