An advanced 3D format generation architecture for video and depth

Pin Chen Kuo, Kuan Ting Lee, Ching Lun Chou, Chun Wei Chang, Bin Da Liu, Jar Ferr Yang

研究成果: Conference contribution

1 引文 斯高帕斯(Scopus)

摘要

In this paper, a hardware design for packing and depacking the 2D frame-compatible format suggested in [1] is proposed. Compared to the previous format that uses one view with one depth, the advanced 2D-compatible format reduces the bitrates of both the color and depth frames. For hardware costs, the operation frequency can reach 166.56 MHz, which can support maximum frame size up to FHD in real time.

原文English
主出版物標題2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
發行者Institute of Electrical and Electronics Engineers Inc.
頁面654-657
頁數4
ISBN(電子)9781509015702
DOIs
出版狀態Published - 2017 一月 3
事件2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of
持續時間: 2016 十月 252016 十月 28

出版系列

名字2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

Other

Other2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
國家Korea, Republic of
城市Jeju
期間16-10-2516-10-28

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Signal Processing

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