An efficient architecture of multiple 8×8 transforms for H.264/AVC and VC-1 decoders

Yi Chih Chao, Shih Tse Wei, Chia Hung Kao, Bin Da Liu, Jar Ferr Yang

研究成果: Conference contribution

5 引文 斯高帕斯(Scopus)

摘要

This paper proposes an efficient architecture, which can perform multiple 8×8 transforms for both H.264/AVC and VC-1 decoders. The hardware design which supports multiple standards becomes more and more important. By designing a unique data flow for VC-1 8×8 inverse transform, the H.264/AVC and VC-1 8×8 inverse transforms are realized in a hardware sharing architecture. The proposed multiple transforms architecture contains fast one-dimensional (1-D) transforms and rounding operations. Simulation results show the proposed architecture takes 6, 702 gates which are much less than the individual designs for the H.264/AVC and VC-1 8×8 inverse transforms.

原文English
主出版物標題1st International Conference on Green Circuits and Systems, ICGCS 2010
頁面595-598
頁數4
DOIs
出版狀態Published - 2010
事件1st International Conference on Green Circuits and Systems, ICGCS 2010 - Shanghai, China
持續時間: 2010 六月 212010 六月 23

出版系列

名字1st International Conference on Green Circuits and Systems, ICGCS 2010

Other

Other1st International Conference on Green Circuits and Systems, ICGCS 2010
國家/地區China
城市Shanghai
期間10-06-2110-06-23

All Science Journal Classification (ASJC) codes

  • 硬體和架構
  • 電氣與電子工程

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