An efficient hybrid cache coherence protocol for shared memory multiprocessors

Yeimkuan Chang, L. N. Bhuyan

研究成果: Conference contribution

4 引文 斯高帕斯(Scopus)

摘要

This paper presents a new tree-based cache coherence protocol which is a hybrid of the limited directory and the linked list schemes. By utilizing a limited number of pointers in the directory, the proposed protocol connects the nodes caching a shared block in a tree fashion. In addition to the low communication overhead, the proposed scheme also contains the advantages of the existing bit-map and tree-based linked list protocols, namely, scalable memory requirement and logarithmic invalidation latency. We evaluate the performance of our protocol by running four applications on an execution-driven simulator. Our simulation results show that the performance of the proposed protocol is very close to that of the full-map directory protocol.

原文English
主出版物標題Architecture
編輯A. Reeves
發行者Institute of Electrical and Electronics Engineers Inc.
頁面172-179
頁數8
ISBN(電子)081867623X
DOIs
出版狀態Published - 1996
事件25th International Conference on Parallel Processing, ICPP 1996 - Ithaca, United States
持續時間: 1996 8月 121996 8月 16

出版系列

名字Proceedings of the International Conference on Parallel Processing
1
ISSN(列印)0190-3918

Other

Other25th International Conference on Parallel Processing, ICPP 1996
國家/地區United States
城市Ithaca
期間96-08-1296-08-16

All Science Journal Classification (ASJC) codes

  • 軟體
  • 數學(全部)
  • 硬體和架構

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