An NBTI-Aware Task Parallelism Scheme for Improving Lifespan of Multi-core Systems

Yu Guang Chen, Yu Yi Lin, Ing Chao Lin

研究成果: Conference contribution

摘要

Task parallelism schemes with a multi-core system are widely used through various applications nowadays to obtain better throughput. Most of previous works will try to find maximum degree of parallelism (DOP) to achieve best performance. However, aging effects have become an unavoidable threat which may degrade system performance and even cause functional failure. We observe that if a task is always executed with maximum DOP, all cores may continuously suffer from the NBTI effect and wear out soon. On the other hand, if we can decrease DOP without causing task deadline violation, some cores may have opportunities to be power-gated and recover from the NBTI effect. In this paper, we propose a novel NBTI-Aware task parallelism framework for multi-core systems to realize such an idea. Our framework first prioritizes ready tasks based on its criticality and then decide best DOP of each task without causing timing violation. After that, a task-To-core mapping algorithm which considers both IR-drop and core utilization is proposed. Finally, a recover decision algorithm is used to find the suitable recover mode of each core. Experimental results show that the proposed NBTI-Aware task parallelism framework can successfully extend system lifetime to 3.7 times compared with MAX DOP method.

原文English
主出版物標題Proceedings of the 21st International Symposium on Quality Electronic Design, ISQED 2020
發行者IEEE Computer Society
頁面117-122
頁數6
ISBN(電子)9781728142074
DOIs
出版狀態Published - 2020 三月
事件21st International Symposium on Quality Electronic Design, ISQED 2020 - Santa Clara, United States
持續時間: 2020 三月 252020 三月 26

出版系列

名字Proceedings - International Symposium on Quality Electronic Design, ISQED
2020-March
ISSN(列印)1948-3287
ISSN(電子)1948-3295

Conference

Conference21st International Symposium on Quality Electronic Design, ISQED 2020
國家United States
城市Santa Clara
期間20-03-2520-03-26

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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