This paper proposes a splittable amplifier technique that can be either decomposed into two identical halves or merged for enhancing the utilization of the amplifier power and alleviating the memory effect, when applying operational amplifier (opamp) sharing. In a two-phase clock system, the amplifier can be split into two identical small amplifiers in one phase simultaneously for use in two circuits. Next, the two small amplifiers can be merged into one amplifier in the other phase for usage in another circuit. Compared with the conventional opamp sharing, a more power-efficient amplifier arrangement is achieved in the split mode. In this paper, three individual sample-and-hold (S/H) circuits with the proposed technique are designed to demonstrate the efficiency of memory effect cancellation. The simulations show that in contrast to the output spectrum of two S/H circuits with conventional opamp sharing, the spurious tones due to the memory effect can be suppressed by at least 14.66 dB in the split mode and at least 7.32 dB in the combination mode with a 0.6-VP-P input signal when using the proposed technique.
|頁（從 - 到）||621-634|
|期刊||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|出版狀態||Published - 2017 二月|
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering