TY - JOUR
T1 - Analysis and Design of Mixed-Mode Operation for Noninverting Buck-Boost DC-DC Converters
AU - Wu, Kuo Chun
AU - Wu, Hung Hsien
AU - Wei, Chia Ling
N1 - Funding Information:
This work was supported by the Ministry of Science and Technology, Taiwan, under Grant NSC-102-2221-E-006-284-MY3 and Grant MOST-103-2220-E-006-008. This brief was recommended by Associate Editor H. Lee. The authors would like to thank the National Chip Implementation Center, National Applied Research Laboratories, Hsinchu, Taiwan, for their support in the chip fabrication.
PY - 2015/12
Y1 - 2015/12
N2 - A noninverting buck-boost dc-dc converter can work in the buck, boost, or buck-boost mode, but it has been analyzed that operating in the buck-boost mode has the lowest efficiency. However, if the buck-boost mode is excluded, the converter may jump between the buck and boost modes when the input voltage approaches the output voltage. This transition region is called the mixed mode, and larger output voltage ripples are expectable. In this brief, the conditions for the converter to operate in the mixed mode are analyzed, including the impact of mismatches between ramp signals, and a ramp generator is designed accordingly. Moreover, a full-cycle current-sensing circuit is proposed, and it can effectively inhibit the switching noise on the sensed current signal. The proposed chip was fabricated by the 0.35- μm 2P4M 3.3-V/5-V mixed-signal polycide process. The maximal measured efficiency is 93.5%.
AB - A noninverting buck-boost dc-dc converter can work in the buck, boost, or buck-boost mode, but it has been analyzed that operating in the buck-boost mode has the lowest efficiency. However, if the buck-boost mode is excluded, the converter may jump between the buck and boost modes when the input voltage approaches the output voltage. This transition region is called the mixed mode, and larger output voltage ripples are expectable. In this brief, the conditions for the converter to operate in the mixed mode are analyzed, including the impact of mismatches between ramp signals, and a ramp generator is designed accordingly. Moreover, a full-cycle current-sensing circuit is proposed, and it can effectively inhibit the switching noise on the sensed current signal. The proposed chip was fabricated by the 0.35- μm 2P4M 3.3-V/5-V mixed-signal polycide process. The maximal measured efficiency is 93.5%.
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U2 - 10.1109/TCSII.2015.2469032
DO - 10.1109/TCSII.2015.2469032
M3 - Article
AN - SCOPUS:84961575493
VL - 62
SP - 1194
EP - 1198
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
SN - 1549-7747
IS - 12
M1 - 7206556
ER -