Analytic model for asymmetric trapezoidal-gate MOSFET

C. H. Kao, S. K. Cho, C. T. Wei, S. C. Wong, Mau-phon Houng, Yeong-Her Wang

研究成果: Paper

1 引文 (Scopus)

摘要

The innovative Asymmetric trapezoidal gate( ATG) structure has a relatively narrow drain-side width as compared to the source-side width, giving the trapezoidal shape of ATG MOSFETs. In this paper, an analytic model including the DC drain current and AC dynamic capacitance will be demonstrated. The DC linear/saturation drain current has been derived by Poisson's equation, with Green's function method. The subthreshold current will be also induced by Poisson's equation, with the polynomial function as our main strategy. On the AC dynamic capacitance, we follow Ward and Dutton's channel charge scheme to partition QD and QS, thus all the capacitance can be obtained. Above all, in comparisons with the simulation results, our model are in good agreement with the measurement data. Besides, our model provide an effective and economic way to describe the characteristics of the ATG devices.

原文English
頁面420-423
頁數4
出版狀態Published - 1998 十二月 1
事件Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China
持續時間: 1998 十月 211998 十月 23

Other

OtherProceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology
城市Beijing, China
期間98-10-2198-10-23

指紋

Capacitance
Drain current
Poisson equation
Green's function
Polynomials
Economics

All Science Journal Classification (ASJC) codes

  • Engineering(all)

引用此文

Kao, C. H., Cho, S. K., Wei, C. T., Wong, S. C., Houng, M., & Wang, Y-H. (1998). Analytic model for asymmetric trapezoidal-gate MOSFET. 420-423. 論文發表於 Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China, .
Kao, C. H. ; Cho, S. K. ; Wei, C. T. ; Wong, S. C. ; Houng, Mau-phon ; Wang, Yeong-Her. / Analytic model for asymmetric trapezoidal-gate MOSFET. 論文發表於 Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China, .4 p.
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Kao, CH, Cho, SK, Wei, CT, Wong, SC, Houng, M & Wang, Y-H 1998, 'Analytic model for asymmetric trapezoidal-gate MOSFET', 論文發表於 Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China, 98-10-21 - 98-10-23 頁 420-423.

Analytic model for asymmetric trapezoidal-gate MOSFET. / Kao, C. H.; Cho, S. K.; Wei, C. T.; Wong, S. C.; Houng, Mau-phon; Wang, Yeong-Her.

1998. 420-423 論文發表於 Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China, .

研究成果: Paper

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AB - The innovative Asymmetric trapezoidal gate( ATG) structure has a relatively narrow drain-side width as compared to the source-side width, giving the trapezoidal shape of ATG MOSFETs. In this paper, an analytic model including the DC drain current and AC dynamic capacitance will be demonstrated. The DC linear/saturation drain current has been derived by Poisson's equation, with Green's function method. The subthreshold current will be also induced by Poisson's equation, with the polynomial function as our main strategy. On the AC dynamic capacitance, we follow Ward and Dutton's channel charge scheme to partition QD and QS, thus all the capacitance can be obtained. Above all, in comparisons with the simulation results, our model are in good agreement with the measurement data. Besides, our model provide an effective and economic way to describe the characteristics of the ATG devices.

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Kao CH, Cho SK, Wei CT, Wong SC, Houng M, Wang Y-H. Analytic model for asymmetric trapezoidal-gate MOSFET. 1998. 論文發表於 Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China, .