Application of low-frequency clock signals to gate driver circuits

Chih-Lung Lin, Mao Hsun Cheng

研究成果: Conference article

3 引文 (Scopus)

摘要

This paper collates design concepts of lowpower gate driver circuits, and our related work is reviewed. Many approaches to power consumption amelioration have been developed and-focus on different parts of circuit structures. Recently, low-frequency clock signals are adopted to further reduce both power consumption and thin-film transistor (TFT) threshold voltage shifts (ΔV TH ).

原文English
頁(從 - 到)64-67
頁數4
期刊Digest of Technical Papers - SID International Symposium
48
發行號1
DOIs
出版狀態Published - 2017 一月 1
事件SID Symposium, Seminar, and Exhibition 2017, Display Week 2017 - Los Angeles, United States
持續時間: 2017 五月 212017 五月 26

指紋

Clocks
Electric power utilization
Networks (circuits)
Thin film transistors
Threshold voltage

All Science Journal Classification (ASJC) codes

  • Engineering(all)

引用此文

@article{f5ddee485178481d98502ad5f7cf66e5,
title = "Application of low-frequency clock signals to gate driver circuits",
abstract = "This paper collates design concepts of lowpower gate driver circuits, and our related work is reviewed. Many approaches to power consumption amelioration have been developed and-focus on different parts of circuit structures. Recently, low-frequency clock signals are adopted to further reduce both power consumption and thin-film transistor (TFT) threshold voltage shifts (ΔV TH ).",
author = "Chih-Lung Lin and Cheng, {Mao Hsun}",
year = "2017",
month = "1",
day = "1",
doi = "10.1002/sdtp.11559",
language = "English",
volume = "48",
pages = "64--67",
journal = "Digest of Technical Papers - SID International Symposium",
issn = "0097-966X",
number = "1",

}

Application of low-frequency clock signals to gate driver circuits. / Lin, Chih-Lung; Cheng, Mao Hsun.

於: Digest of Technical Papers - SID International Symposium, 卷 48, 編號 1, 01.01.2017, p. 64-67.

研究成果: Conference article

TY - JOUR

T1 - Application of low-frequency clock signals to gate driver circuits

AU - Lin, Chih-Lung

AU - Cheng, Mao Hsun

PY - 2017/1/1

Y1 - 2017/1/1

N2 - This paper collates design concepts of lowpower gate driver circuits, and our related work is reviewed. Many approaches to power consumption amelioration have been developed and-focus on different parts of circuit structures. Recently, low-frequency clock signals are adopted to further reduce both power consumption and thin-film transistor (TFT) threshold voltage shifts (ΔV TH ).

AB - This paper collates design concepts of lowpower gate driver circuits, and our related work is reviewed. Many approaches to power consumption amelioration have been developed and-focus on different parts of circuit structures. Recently, low-frequency clock signals are adopted to further reduce both power consumption and thin-film transistor (TFT) threshold voltage shifts (ΔV TH ).

UR - http://www.scopus.com/inward/record.url?scp=85044474568&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85044474568&partnerID=8YFLogxK

U2 - 10.1002/sdtp.11559

DO - 10.1002/sdtp.11559

M3 - Conference article

VL - 48

SP - 64

EP - 67

JO - Digest of Technical Papers - SID International Symposium

JF - Digest of Technical Papers - SID International Symposium

SN - 0097-966X

IS - 1

ER -