Area-efficient versatile Reed-Solomon decoder for ADSL

Jin Chuan Huang, Chien Ming Wu, Ming-Der Shieh, Chien Hsing Wu

研究成果: Conference contribution

16 引文 斯高帕斯(Scopus)

摘要

We present an area-efficient, bit-serial VLSI architecture for the t-error-correcting, (n, k)-scalable Reed-Solomon (RS) decoder in GF(2m) based on the modified Euclidean algorithm. With its ability to support a variety of (n, k) RS codes, this RS decoder is suitable for applications such as the asymmetric digital subscriber line (ADSL) and cable modems.

原文English
主出版物標題Proceedings - IEEE International Symposium on Circuits and Systems
發行者IEEE
ISBN(列印)0780354729
出版狀態Published - 1999 一月 1
事件Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 - Orlando, FL, USA
持續時間: 1999 五月 301999 六月 2

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
1
ISSN(列印)0271-4310

Other

OtherProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99
城市Orlando, FL, USA
期間99-05-3099-06-02

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Huang, J. C., Wu, C. M., Shieh, M-D., & Wu, C. H. (1999). Area-efficient versatile Reed-Solomon decoder for ADSL. 於 Proceedings - IEEE International Symposium on Circuits and Systems (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 1). IEEE.