Assessment of structure variation in silicon nanowire FETs and impact on SRAM

Yi Bo Liao; Meng Hsueh Chiang; Keunwoo Kim; Wei Chou Hsu

doi:10.1016/j.mejo.2011.12.002

Assessment of structure variation in silicon nanowire FETs and impact on SRAM

Yi Bo Liao, Meng Hsueh Chiang, Keunwoo Kim, Wei Chou Hsu

研究成果: Article › 同行評審

7 引文斯高帕斯（Scopus）

摘要

Impact of device structure variability of silicon nanowire FETs is assessed and SRAM design implication is presented based on 3-D numerical simulation. Both the conventional and junctionless nanowire FETs are shown to be sensitive to structural variation whereas the former is more tolerable. Both the circular wire and non-circular wire cases for feasible SRAM design with a focus on read/write noise margin are included in our study.

原文	English
頁（從 - 到）	300-304
頁數	5
期刊	Microelectronics Journal
卷	43
發行號	5
DOIs	https://doi.org/10.1016/j.mejo.2011.12.002
出版狀態	Published - 2012 五月

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Condensed Matter Physics
Surfaces, Coatings and Films
Electrical and Electronic Engineering

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10.1016/j.mejo.2011.12.002

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