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Augmenting slicing trees for analog placement

  • Mark Po Hung Lin
  • , Bo Hao Chiang
  • , Jen Chieh Chang
  • , Yu Chang Wu
  • , Rong Guey Chang
  • , Shuenn Yuh Lee

研究成果: Conference contribution

7   !!Link opens in a new tab 引文 斯高帕斯(Scopus)

摘要

The slicing-tree representation had been proven to be very effective and efficient in optimizing floorplanning/placement and handling design/layout migration in modern system-on-chips (SoCs). However, none of the previous works introduced any symmetric-feasible condition in the slicing trees for analog device-level placement. This paper augments the slicing trees by introducing a new insertion operation and presents the symmetric-feasible conditions. Based on the augmented slicing trees and the symmetric-feasible conditions, various symmetric placements can be effectively explored during analog placement optimization.

原文English
主出版物標題2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
頁面57-60
頁數4
DOIs
出版狀態Published - 2012
事件2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 - Seville, Spain
持續時間: 2012 9月 192012 9月 21

出版系列

名字2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012

Other

Other2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
國家/地區Spain
城市Seville
期間12-09-1912-09-21

All Science Journal Classification (ASJC) codes

  • 建模與模擬

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