Automated synthesis of asynchronous pipelines

Yau Hwang Kuo; Shaw Pyng Lo

doi:10.1109/ISCAS.1992.230159

Automated synthesis of asynchronous pipelines

Yau Hwang Kuo, Shaw Pyng Lo

資訊工程學系

研究成果: Conference contribution

3 引文斯高帕斯（Scopus）

摘要

This paper proposes a system for the automatic synthesis of asynchronous pipelines. A high-level hardware description language (HDL), called Masil-II, is developed to describe the circuit behavior at algorithmic level. Modified Petri-Net is used as intermediate description. From the intermediate description, several techniques such as clique partitioning, simulated evolution and heuristics are applied to realize the data path synthesis task. Experimental results have confirmed their efficiency.

原文	English
主出版物標題	1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	685-688
頁數	4
ISBN（電子）	0780305930
DOIs	https://doi.org/10.1109/ISCAS.1992.230159
出版狀態	Published - 1992
事件	1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992 - San Diego, United States 持續時間: 1992 五月 10 → 1992 五月 13

出版系列

名字	Proceedings - IEEE International Symposium on Circuits and Systems
卷	2
ISSN（列印）	0271-4310

Conference

Conference	1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
國家	United States
城市	San Diego
期間	92-05-10 → 92-05-13

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

存取文件

10.1109/ISCAS.1992.230159

指紋深入研究「Automated synthesis of asynchronous pipelines」主題。共同形成了獨特的指紋。

引用此

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Kuo, YH & Lo, SP 1992, Automated synthesis of asynchronous pipelines. 於 1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992., 230159, Proceedings - IEEE International Symposium on Circuits and Systems, 卷 2, Institute of Electrical and Electronics Engineers Inc., 頁 685-688, 1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992, San Diego, United States, 92-05-10. https://doi.org/10.1109/ISCAS.1992.230159

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