Automated synthesis of asynchronous pipelines

Yau Hwang Kuo, Shaw Pyng Lo

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

This paper proposes a system for the automatic synthesis of asynchronous pipelines. A high-level hardware description language (HDL), called Masil-II, is developed to describe the circuit behavior at algorithmic level. Modified Petri-Net is used as intermediate description. From the intermediate description, several techniques such as clique partitioning, simulated evolution and heuristics are applied to realize the data path synthesis task. Experimental results have confirmed their efficiency.

原文English
主出版物標題1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
發行者Institute of Electrical and Electronics Engineers Inc.
頁面685-688
頁數4
ISBN(電子)0780305930
DOIs
出版狀態Published - 1992
事件1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992 - San Diego, United States
持續時間: 1992 五月 101992 五月 13

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2
ISSN(列印)0271-4310

Conference

Conference1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
國家United States
城市San Diego
期間92-05-1092-05-13

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

指紋 深入研究「Automated synthesis of asynchronous pipelines」主題。共同形成了獨特的指紋。

引用此