This study is the first to investigate different reliability mechanisms of high-performance low-temperature polycrystalline silicon thin-film transistors (TFTs) with a HfO2 gate dielectric before and after dual plasma treatment (DPT) under various bias temperature instability (BTI) stresses. DPT samples under positive bias temperature instability (PBI) and negative bias temperature instability (NBI) stresses exhibited different degradation phenomena because of the negative polarity trapped oxide charges and positive fixed oxide charges (Si+), respectively. In addition, experimental data exhibited better reliability immunity for PBI stress than NBI stress after DPT. Furthermore, we raised the temperature to clearly observe the effect of the PBTI stress analysis for samples with and without DPT. Extracted measurement results showed distinct time evolutions of the interface state densities (Nit) for samples with and without DPT, revealing the different mechanisms of Nit generation with and without DPT. Finally, we proposed a novel reliability mechanism called the quasi reaction-diffusion model to explain the generation of ΔNit, which also explains the unclear phenomena of mobility boost.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering