BIST scheme for DAC testing

Soon-Jyh Chang, C. L. Lee, J. E. Chen

研究成果: Article

21 引文 (Scopus)

摘要

A low-cost, built-in self-test (BIST) scheme for a digital-to-analogue converter (DAC) is presented. The basic idea is to convert the DAC output voltages corresponding to different input codes into different oscillation frequencies through a voltage controlled oscillator (VCO), and further transfer these frequencies to different digital codes using a counter. According to the input and output codes, performances of a DAC, such as offset error, gain error, differential nonlinearity (DNL), integral nonlinearity (INL), could be effectively detected by simply using digital circuits rather than complex analogue ones. In addition, the annoying DAC output noise could be naturally filtered out by this BIST method.

原文English
頁(從 - 到)776-777
頁數2
期刊Electronics Letters
38
發行號15
DOIs
出版狀態Published - 2002 七月 18

指紋

Built-in self test
Digital to analog conversion
Testing
Variable frequency oscillators
Digital circuits
Electric potential
Costs

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

引用此文

Chang, Soon-Jyh ; Lee, C. L. ; Chen, J. E. / BIST scheme for DAC testing. 於: Electronics Letters. 2002 ; 卷 38, 編號 15. 頁 776-777.
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Chang, S-J, Lee, CL & Chen, JE 2002, 'BIST scheme for DAC testing', Electronics Letters, 卷 38, 編號 15, 頁 776-777. https://doi.org/10.1049/el:20020530

BIST scheme for DAC testing. / Chang, Soon-Jyh; Lee, C. L.; Chen, J. E.

於: Electronics Letters, 卷 38, 編號 15, 18.07.2002, p. 776-777.

研究成果: Article

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