摘要
Boundary scan, also known as the IEEE or JTAG standard, appears to be the most successful test standard ever approved by the IEEE. This chapter focuses on the 1149.1, 1149.6, and 1500 test standards. Test architectures to support these standards are also reviewed in the chapter. Currently, boundary scan is widely used throughout the industry; most commercial computer-aided test tools provide automatic synthesis capability for boundary-scan design. This chapter introduces the boundary-scan family of standards and their current status. The 1149.1 standard is then described in detail. On-chip design to support scan and BIST by 1149.1 and board or system-level controller design for 1149.1 is also briefly addresses in the chapter. It also presents test control architectures to support 1500 design with the plug-and-play feature and hierarchical test structures. This chapter concludes by discussing a comparison between 1149.1 and 1500.
原文 | English |
---|---|
主出版物標題 | VLSI Test Principles and Architectures |
主出版物子標題 | Design for Testability |
發行者 | Elsevier |
頁面 | 557-618 |
頁數 | 62 |
ISBN(電子) | 9780123705976 |
ISBN(列印) | 9780080474793 |
DOIs | |
出版狀態 | Published - 2006 1月 1 |
All Science Journal Classification (ASJC) codes
- 工程 (全部)
- 商業、管理和會計 (全部)