Building a multi-kernel embedded system with high performance IPC mechanism

Jing Chen, Da Wei Chang, Chung Ping Young, Guan Ying Huang, Su Lin Chu, Chung Yuan Ke, Shih Tun Yen, Tsang Shuo Kuo

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

Many consumer embedded system products nowadays are built on platforms with System-On-a-Chip (SOC) in which two or more processor cores, which are not necessarily of the same type, are put into a single chip and form the architecture of Chip-level Multi-Processor (CMP). Although such platform is capable of achieving high performance at relatively low cost, the system architecture of CMP brings new challenges in system development and increases complexity in developing embedded software especially at the level of kernel or operating system. This paper presents our experience and some preliminary results from building a multi-kernel embedded system with high performance Inter-Process Communication (IPC) mechanism for application software running on the platform of a newly developed multi-core SOC, namely PAC Duo SOC, which is the latest product from the PAC (short for Parallel Architecture Core) Project implemented at Industry Technology Research Institute (ITRI) in Taiwan. PAC Duo SOC is a heterogeneous multi-processor SOC composed of one ARM926 core serving as the general purpose processor (GPP) and two ITRI PAC DSP cores serving as the special purpose processors (SPP). We ported Linux operating system to run on the ARM926 processor and ported the real-time kernel Micro-C/OS-II to run on one PAC DSP core, leaving the other PAC DSP core with the option of running either another Micro-C/OS-II or a different kernel. To address the issues in IPC, a high performance message-passing mechanism is developed. Its design not only takes application-specific requirements into account but also takes advantages of hardware features.

原文English
主出版物標題Proc.- 2011 IEEE International Conference on HPCC 2011 - 2011 IEEE International Workshop on FTDCS 2011 - Workshops of the 2011 Int. Conf. on UIC 2011- Workshops of the 2011 Int. Conf. ATC 2011
頁面506-511
頁數6
DOIs
出版狀態Published - 2011 十一月 24
事件13th IEEE International Workshop on FTDCS 2011, the 8th International Conference on ATC 2011, the 8th International Conference on UIC 2011 and the 13th IEEE International Conference on HPCC 2011 - Banff, AB, Canada
持續時間: 2011 九月 22011 九月 4

出版系列

名字Proc.- 2011 IEEE International Conference on HPCC 2011 - 2011 IEEE International Workshop on FTDCS 2011 -Workshops of the 2011 Int. Conf. on UIC 2011- Workshops of the 2011 Int. Conf. ATC 2011

Other

Other13th IEEE International Workshop on FTDCS 2011, the 8th International Conference on ATC 2011, the 8th International Conference on UIC 2011 and the 13th IEEE International Conference on HPCC 2011
國家Canada
城市Banff, AB
期間11-09-0211-09-04

All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Computer Networks and Communications

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    Chen, J., Chang, D. W., Young, C. P., Huang, G. Y., Chu, S. L., Ke, C. Y., Yen, S. T., & Kuo, T. S. (2011). Building a multi-kernel embedded system with high performance IPC mechanism. 於 Proc.- 2011 IEEE International Conference on HPCC 2011 - 2011 IEEE International Workshop on FTDCS 2011 - Workshops of the 2011 Int. Conf. on UIC 2011- Workshops of the 2011 Int. Conf. ATC 2011 (頁 506-511). [6063032] (Proc.- 2011 IEEE International Conference on HPCC 2011 - 2011 IEEE International Workshop on FTDCS 2011 -Workshops of the 2011 Int. Conf. on UIC 2011- Workshops of the 2011 Int. Conf. ATC 2011). https://doi.org/10.1109/HPCC.2011.72