Built-in high resolution signal generator for testing ADC and DAC

Yeong Jar Chang, Soon Jyh Chang, Jung Chi Ho, Chee Kian Ong, Ting Cheng, Wen Ching Wu

研究成果: Conference contribution

6 引文 斯高帕斯(Scopus)

摘要

This paper presents a design of the built-in high resolution signal generator for testing analog-to-digital converter (ADC) and digital-to-analog converter (DAC). The sigma-delta demodulator scheme is used in the design to generate on-chip high accurate stimulus. We discuss the issues on the generation of all the required stimuli using the same circuitry and other issues on implementing this scheme. Our signal generator can be applied to test the embedded 13-bit ADC and DAC in Asvmmetry Digital Subscriber Line System on a Chip (ADSL SoC).

原文English
主出版物標題VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
頁面231-234
頁數4
ISBN(電子)0780377656
DOIs
出版狀態Published - 2003 一月 1
事件20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003 - Hsinchu, Taiwan
持續時間: 2003 十月 62003 十月 8

出版系列

名字International Symposium on VLSI Technology, Systems, and Applications, Proceedings
2003-January
ISSN(列印)1930-8868

Other

Other20th International Symposium on VLSI Technology, Systems and Applications, VLSI 2003
國家/地區Taiwan
城市Hsinchu
期間03-10-0603-10-08

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 凝聚態物理學
  • 電氣與電子工程

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