Built-in self-test and self-diagnosis scheme for embedded SRAM

Chih Wea Wang, Chi Feng Wu, Jin Fu Li, Cheng Wen Wu, Tony Teng, Kevin Chiu, Hsiao Ping Lin

研究成果: Conference article同行評審

37 引文 斯高帕斯(Scopus)

摘要

Embedded memory test and diagnosis is becoming an important issue in system-on-chip (SOC) development. Direct access of the memory cores from the limited number of I/O pins is usually not feasible. Built-in self-diagnosis (BISD), which include built-in self-test (BIST), is rapidly becoming the most acceptable solution. We propose a BISD design and a fault diagnosis system for embedded SRAM. It supports manufacturing test as well as diagnosis for design verification and yield improvement. The proposed BISD circuit is on-line programmable for its March test algorithms. Test chips have been designed and implemented. Our experimental results show that the BISD hardware overhead is about 2.4% for a typical 128 Kb SRAM and only 0.65% for a 2 Mb SRAM.

原文English
頁(從 - 到)45-50
頁數6
期刊Proceedings of the Asian Test Symposium
出版狀態Published - 2000 十二月 1
事件9th Asian Test Symposium - Taipei, Taiwan
持續時間: 2000 十二月 42000 十二月 6

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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