Cache write generate for high performance parallel processing

C. M. Wittenbrink, A. K. Somani, Chung-Ho Chen

研究成果: Conference contribution

摘要

We present, Generate, a new cache write handling scheme that avoids unnecessary reads from main memory, reduces bus contention, and increases the available bandwidth of the memory. Cache Write Generate increases the amount of CPU execution and memory load/store overlap, and decreases the memory cycle time. We compare the performance of cache write generate with write around and write allocate in single processor and shared bus multiprocessors and demonstrate a speedup of 1.2 to 1.5 over allocate and write around.

原文English
主出版物標題Proceedings of the Ninth Annual International Symposium on Computer Architecture
發行者Publ by ACM
頁數1
ISBN(列印)0897915097
出版狀態Published - 1993 十二月 1
事件Proceedings of the 19th Annual International Symposium on Compu- ter Architecture - Gold Coast, Aust
持續時間: 1992 五月 191992 五月 21

出版系列

名字Proceedings of the Ninth Annual International Symposium on Computer Architecture

Other

OtherProceedings of the 19th Annual International Symposium on Compu- ter Architecture
城市Gold Coast, Aust
期間92-05-1992-05-21

All Science Journal Classification (ASJC) codes

  • 工程 (全部)

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