Capacitor-less low-dropout regulator with slew-rate-enhanced circuit

Chien-Hung Tsai, J. H. Wang

研究成果: Article同行評審

6 引文 斯高帕斯(Scopus)


A capacitor-less low-power low-dropout regulator (LDR) with a slew-rate-enhanced circuit (SRE) was proposed. The SRE uses six transistors to constitute two comparators and two auxiliary transistors. The comparators sense the variation of load current to control one of the auxiliary transistors that generate a large current to charge or discharge the gate capacitor of the power transistor; thus SRE increases the slew-rate at the gate of the power transistor. The quiescent current of the LDR remains 18 μA at the steady state because the auxiliary transistors work at the cut-off region to reduce power consumption. When load current changes between 0.1 and 100 mA, the variation of the output voltage of the LDR is improved from 675 to 300 mV.

頁(從 - 到)384-391
期刊IET Circuits, Devices and Systems
出版狀態Published - 2011 9月 1

All Science Journal Classification (ASJC) codes

  • 控制與系統工程
  • 電氣與電子工程


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