CASA: Contention-aware scratchpad memory allocation for online hybrid on-chip memory management

Da-Wei Chang, Ing-Chao Lin, Yu Shiang Chien, Chin Lun Lin, Wen-Yu Su, Chung-Ping Young

研究成果: Article

8 引文 斯高帕斯(Scopus)

摘要

Scratchpad memory (SPM) has been increasingly used in embedded systems due to its higher efficiency in terms of energy and area compared to that of ordinary cache. A hybrid on-chip memory architecture that combines SPM with a mini-cache has been proposed. One key issue for hybrid on-chip memory architectures is to reduce the number of off-chip memory accesses and energy consumption. Existing methods achieve this by moving the most frequently accessed data into SPM. However, these methods may be ineffective because the main source of off-chip memory accesses may not be the most frequently accessed data. Instead, most off-chip memory accesses are caused by cache misses, so reducing the latter will reduce the former. Cache misses are mainly caused by data contending for cache lines. Therefore, this paper proposes a contention-aware SPM allocation method for hybrid on-chip management. The number of cache misses for a page is used as a metric to determine whether a page should be moved to SPM. When the number of misses for a page exceeds a threshold, the page is moved to SPM, reducing cache contention. Experimental results show that the proposed method can reduce the energy delay product by 35% to 53% compared to a cache-only on-chip memory architecture and 19% to 31% compared to an existing hybrid on-chip memory architecture.

原文English
文章編號6923417
頁(從 - 到)1806-1817
頁數12
期刊IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
33
發行號12
DOIs
出版狀態Published - 2014 一月 1

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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