Characteristics enhancement of a GaAs based heterostructure field-effect transistor with an electrophoretic deposition (EPD) surface treated gate structure

Chun Chia Chen, Huey-Ing Chen, I-Ping Liu, Po Cheng Chou, Jian Kai Liou, Yu Ting Tsai, Wen-Chau Liu

研究成果: Article

1 引文 (Scopus)

摘要

A Pt/AlGaAs/InGaAs/GaAs heterostructure field-effect transistor (HFET), prepared by an electrophoretic deposition (EPD) approach on gate Schottky contact region, is fabricated and studied. The EPD-based Pt-gates with three different molar ratios (ω 0 ) are examined by scanning electron microscopy (SEM) image. Good Pt-gate coverage with effective reduction of thermal-induced defects at Pt/AlGaAs interface is achieved through a low temperature EPD approach. Experimentally, for a gate dimension of 1 μm × 100 μm, a lower gate current of 1.9 × 10 -2 mA/mm, a higher turn-on voltage of 0.85 V, a higher maximum drain saturation current of 319.3 mA/mm, and a higher maximum extrinsic transconductance of 146.8 mS/mm are obtained for an EPD-based HFET at 300 K. Moreover, comparable microwave characteristics of an EPD-based HFET are demonstrated at different temperature ambiences. Therefore, based on the improved DC performance and inherent benefits of low cost, simple apparatus, flexible deposition on varied substrates, and adjustable alloy grain size, the proposed EPD approach shows the promise to fabricate high-performance electronic devices.

原文English
頁(從 - 到)120-126
頁數7
期刊Applied Surface Science
341
DOIs
出版狀態Published - 2015 六月 30

指紋

High electron mobility transistors
Transconductance
gallium arsenide
Microwaves
Temperature
Defects
Scanning electron microscopy
Electric potential
Substrates
Costs

All Science Journal Classification (ASJC) codes

  • Surfaces, Coatings and Films

引用此文

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abstract = "A Pt/AlGaAs/InGaAs/GaAs heterostructure field-effect transistor (HFET), prepared by an electrophoretic deposition (EPD) approach on gate Schottky contact region, is fabricated and studied. The EPD-based Pt-gates with three different molar ratios (ω 0 ) are examined by scanning electron microscopy (SEM) image. Good Pt-gate coverage with effective reduction of thermal-induced defects at Pt/AlGaAs interface is achieved through a low temperature EPD approach. Experimentally, for a gate dimension of 1 μm × 100 μm, a lower gate current of 1.9 × 10 -2 mA/mm, a higher turn-on voltage of 0.85 V, a higher maximum drain saturation current of 319.3 mA/mm, and a higher maximum extrinsic transconductance of 146.8 mS/mm are obtained for an EPD-based HFET at 300 K. Moreover, comparable microwave characteristics of an EPD-based HFET are demonstrated at different temperature ambiences. Therefore, based on the improved DC performance and inherent benefits of low cost, simple apparatus, flexible deposition on varied substrates, and adjustable alloy grain size, the proposed EPD approach shows the promise to fabricate high-performance electronic devices.",
author = "Chen, {Chun Chia} and Huey-Ing Chen and I-Ping Liu and Chou, {Po Cheng} and Liou, {Jian Kai} and Tsai, {Yu Ting} and Wen-Chau Liu",
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T1 - Characteristics enhancement of a GaAs based heterostructure field-effect transistor with an electrophoretic deposition (EPD) surface treated gate structure

AU - Chen, Chun Chia

AU - Chen, Huey-Ing

AU - Liu, I-Ping

AU - Chou, Po Cheng

AU - Liou, Jian Kai

AU - Tsai, Yu Ting

AU - Liu, Wen-Chau

PY - 2015/6/30

Y1 - 2015/6/30

N2 - A Pt/AlGaAs/InGaAs/GaAs heterostructure field-effect transistor (HFET), prepared by an electrophoretic deposition (EPD) approach on gate Schottky contact region, is fabricated and studied. The EPD-based Pt-gates with three different molar ratios (ω 0 ) are examined by scanning electron microscopy (SEM) image. Good Pt-gate coverage with effective reduction of thermal-induced defects at Pt/AlGaAs interface is achieved through a low temperature EPD approach. Experimentally, for a gate dimension of 1 μm × 100 μm, a lower gate current of 1.9 × 10 -2 mA/mm, a higher turn-on voltage of 0.85 V, a higher maximum drain saturation current of 319.3 mA/mm, and a higher maximum extrinsic transconductance of 146.8 mS/mm are obtained for an EPD-based HFET at 300 K. Moreover, comparable microwave characteristics of an EPD-based HFET are demonstrated at different temperature ambiences. Therefore, based on the improved DC performance and inherent benefits of low cost, simple apparatus, flexible deposition on varied substrates, and adjustable alloy grain size, the proposed EPD approach shows the promise to fabricate high-performance electronic devices.

AB - A Pt/AlGaAs/InGaAs/GaAs heterostructure field-effect transistor (HFET), prepared by an electrophoretic deposition (EPD) approach on gate Schottky contact region, is fabricated and studied. The EPD-based Pt-gates with three different molar ratios (ω 0 ) are examined by scanning electron microscopy (SEM) image. Good Pt-gate coverage with effective reduction of thermal-induced defects at Pt/AlGaAs interface is achieved through a low temperature EPD approach. Experimentally, for a gate dimension of 1 μm × 100 μm, a lower gate current of 1.9 × 10 -2 mA/mm, a higher turn-on voltage of 0.85 V, a higher maximum drain saturation current of 319.3 mA/mm, and a higher maximum extrinsic transconductance of 146.8 mS/mm are obtained for an EPD-based HFET at 300 K. Moreover, comparable microwave characteristics of an EPD-based HFET are demonstrated at different temperature ambiences. Therefore, based on the improved DC performance and inherent benefits of low cost, simple apparatus, flexible deposition on varied substrates, and adjustable alloy grain size, the proposed EPD approach shows the promise to fabricate high-performance electronic devices.

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