Chemical oxide interfacial layer for the high-k-last/gate-last integration scheme

Ying Tsung Chen; Ssu I. Fu; Wen Tai Chiang; Chien Ting Lin; Shih Hung Tsai; Shao Wei Wang; Shoou Jinn Chang

doi:10.1109/LED.2012.2195292

Chemical oxide interfacial layer for the high-k-last/gate-last integration scheme

Ying Tsung Chen
, Ssu I. Fu
, Wen Tai Chiang
, Chien Ting Lin
, Shih Hung Tsai
, Shao Wei Wang
, Shoou Jinn Chang

微電子工程研究所

研究成果: Article › 同行評審

9 引文斯高帕斯（Scopus）

摘要

The authors propose a high-k-last with gate-last integration scheme with a chemical oxide interfacial layer (IL). It was found that chemical oxide IL could form Hf-silicate at the high-k/\hbox{IL} interface so as to provide us a larger effective k value and a smaller equivalent oxide thickness (EOT). It was also found that the larger leakage current density for the samples with chemical oxide IL could be effectively suppressed by postdeposition annealing (PDA). Furthermore, it was found that PDA-induced larger EOT could be reduced by optimizing the metal gate stack.

原文	English
文章編號	6204313
頁（從 - 到）	946-948
頁數	3
期刊	IEEE Electron Device Letters
卷	33
發行號	7
DOIs	https://doi.org/10.1109/LED.2012.2195292
出版狀態	Published - 2012

All Science Journal Classification (ASJC) codes

電子、光磁材料
電氣與電子工程

存取文件

10.1109/LED.2012.2195292

其它文件與鏈接

引用此

@article{d67ad6348dbb4d4d85d09dc3d9dbd62d,

title = "Chemical oxide interfacial layer for the high-k-last/gate-last integration scheme",

abstract = "The authors propose a high-k-last with gate-last integration scheme with a chemical oxide interfacial layer (IL). It was found that chemical oxide IL could form Hf-silicate at the high-k/\textbackslash{}hbox\{IL\} interface so as to provide us a larger effective k value and a smaller equivalent oxide thickness (EOT). It was also found that the larger leakage current density for the samples with chemical oxide IL could be effectively suppressed by postdeposition annealing (PDA). Furthermore, it was found that PDA-induced larger EOT could be reduced by optimizing the metal gate stack.",

author = "Chen, \{Ying Tsung\} and Fu, \{Ssu I.\} and Chiang, \{Wen Tai\} and Lin, \{Chien Ting\} and Tsai, \{Shih Hung\} and Wang, \{Shao Wei\} and Chang, \{Shoou Jinn\}",

note = "Funding Information: Manuscript received March 24, 2012; accepted April 6, 2012. Date of publication May 24, 2012; date of current version June 22, 2012. This work was supported in part by the Advanced Optoelectronic Technology Center, in part by the Center for Micro/Nano Science and Technology, National Cheng Kung University, under projects from the Ministry of Education, Taiwan, and in part by the Bureau of Energy, Ministry of Economic Affairs of Taiwan, under Contract 100-D0204-6. The review of this letter was arranged by M. {\"O}stling.",

year = "2012",

doi = "10.1109/LED.2012.2195292",

language = "English",

volume = "33",

pages = "946--948",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "7",

}

TY - JOUR

T1 - Chemical oxide interfacial layer for the high-k-last/gate-last integration scheme

AU - Chen, Ying Tsung

AU - Fu, Ssu I.

AU - Chiang, Wen Tai

AU - Lin, Chien Ting

AU - Tsai, Shih Hung

AU - Wang, Shao Wei

AU - Chang, Shoou Jinn

N1 - Funding Information: Manuscript received March 24, 2012; accepted April 6, 2012. Date of publication May 24, 2012; date of current version June 22, 2012. This work was supported in part by the Advanced Optoelectronic Technology Center, in part by the Center for Micro/Nano Science and Technology, National Cheng Kung University, under projects from the Ministry of Education, Taiwan, and in part by the Bureau of Energy, Ministry of Economic Affairs of Taiwan, under Contract 100-D0204-6. The review of this letter was arranged by M. Östling.

PY - 2012

Y1 - 2012

N2 - The authors propose a high-k-last with gate-last integration scheme with a chemical oxide interfacial layer (IL). It was found that chemical oxide IL could form Hf-silicate at the high-k/\hbox{IL} interface so as to provide us a larger effective k value and a smaller equivalent oxide thickness (EOT). It was also found that the larger leakage current density for the samples with chemical oxide IL could be effectively suppressed by postdeposition annealing (PDA). Furthermore, it was found that PDA-induced larger EOT could be reduced by optimizing the metal gate stack.

AB - The authors propose a high-k-last with gate-last integration scheme with a chemical oxide interfacial layer (IL). It was found that chemical oxide IL could form Hf-silicate at the high-k/\hbox{IL} interface so as to provide us a larger effective k value and a smaller equivalent oxide thickness (EOT). It was also found that the larger leakage current density for the samples with chemical oxide IL could be effectively suppressed by postdeposition annealing (PDA). Furthermore, it was found that PDA-induced larger EOT could be reduced by optimizing the metal gate stack.

UR - https://www.scopus.com/pages/publications/84862864487

UR - https://www.scopus.com/pages/publications/84862864487#tab=citedBy

U2 - 10.1109/LED.2012.2195292

DO - 10.1109/LED.2012.2195292

M3 - Article

AN - SCOPUS:84862864487

SN - 0741-3106

VL - 33

SP - 946

EP - 948

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 7

M1 - 6204313

ER -

Chemical oxide interfacial layer for the high-k-last/gate-last integration scheme

摘要

All Science Journal Classification (ASJC) codes

存取文件

其它文件與鏈接

指紋

引用此