Co-synthesis of floorplanning and powerplanning in 3D ICs for multiple supply voltage designs

Jai Ming Lin, Chien Yu Huang, Jhih Ying Yang

研究成果: Conference contribution

1 引文 斯高帕斯(Scopus)

摘要

This paper addresses a 3D floorplanning methodology, which considers floorplanning and powerplanning at the same time for Multiple Supply Voltage (MSV) circuits. Physical design becomes more complex for MSV designs since modules with the same power domain have to be placed at close locations in 3D space to facilitate powerplanning and reduce IR-drop, which would deteriorate wirelength. By properly partitioning modules of the same power domain into several voltage islands and increasing overlap area of the voltage islands in contiguous dies, we can reduce routing resource usage without increasing wirelength significantly. Further, unlike previous works, our approach not only can handle a netlist with soft modules and hard modules but also can meet the fixed-outline constraint. The experimental results show that our methodology gets better results than other approach in designs with single voltage domain and is also promising for MSV designs.

原文English
主出版物標題Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1339-1344
頁數6
ISBN(電子)9783981926316
DOIs
出版狀態Published - 2018 四月 19
事件2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 - Dresden, Germany
持續時間: 2018 三月 192018 三月 23

出版系列

名字Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
2018-January

Other

Other2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
國家Germany
城市Dresden
期間18-03-1918-03-23

All Science Journal Classification (ASJC) codes

  • Safety, Risk, Reliability and Quality
  • Hardware and Architecture
  • Software
  • Information Systems and Management

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