Combinatorial methodologies applied to the advanced CMOS gate stack

K. S. Chang, N. D. Bassim, P. K. Schenck, J. Suehle, I. Takeuchi, M. L. Green

研究成果: Conference contribution

摘要

As the CMOS gate stack continues to scale to smaller dimensions, new materials must be introduced into the stack to keep pace with design requirements. One way to measure the properties of new materials systems is through the use of high-throughput experimentation, called combinatorial methodology. We describe two examples of combinatorial experimental design for CMOS. In the first, we will demonstrate library design and growth of Al-Hf-Y-O films for high-k applications. In the second, we will demonstrate Ni-Ti-Pt metal gate libraries for Si/Hf02/metal gate electrode applications.

原文English
主出版物標題CHARACTERIZATION AND METROLOGY FOR NANOELECTRONICS
主出版物子標題2007 International Conference on Frontiers of Characterization and Metrology
頁面297-302
頁數6
DOIs
出版狀態Published - 2007 十月 22
事件CHARACTERIZATION AND METROLOGY FOR NANOELECTRONICS: 2007 International Conference on Frontiers of Characterization and Metrology - Gaithersburg, MD, United States
持續時間: 2007 三月 272007 三月 29

出版系列

名字AIP Conference Proceedings
931
ISSN(列印)0094-243X
ISSN(電子)1551-7616

Other

OtherCHARACTERIZATION AND METROLOGY FOR NANOELECTRONICS: 2007 International Conference on Frontiers of Characterization and Metrology
國家United States
城市Gaithersburg, MD
期間07-03-2707-03-29

    指紋

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy(all)

引用此

Chang, K. S., Bassim, N. D., Schenck, P. K., Suehle, J., Takeuchi, I., & Green, M. L. (2007). Combinatorial methodologies applied to the advanced CMOS gate stack. 於 CHARACTERIZATION AND METROLOGY FOR NANOELECTRONICS: 2007 International Conference on Frontiers of Characterization and Metrology (頁 297-302). (AIP Conference Proceedings; 卷 931). https://doi.org/10.1063/1.2799387