In this paper, the low-complexity hardware architectures of 4×4 forward and inverse transforms with integrated quantizer and dequantizer for H.264 advanced video coders (AVC) are proposed. By applying the regularity of the quantization matrix, the quantization can be merged into transform step, which results in the reduction of the hardware complexity in VLSI implementation. The proposed integrated transforms have been synthesized with TSMC 0.35 μm technology. Simulation results show that it can achieve 256 M samples/sec at 32 MHz in encoder part and 448 M samples/sec at 56 MHz in decoder part, respectively.
|頁（從 - 到）||1802-1805|
|期刊||Proceedings - IEEE International Symposium on Circuits and Systems|
|出版狀態||Published - 2005 十二月 1|
|事件||IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan|
持續時間: 2005 五月 23 → 2005 五月 26
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering