Combined 2-D transform and quantization architectures for H.264 video coders

Heng Yao Lin, Yi Chih Chao, Che Hong Chen, Bin Da Liu, Jar Ferr Yang

研究成果: Conference article

40 引文 斯高帕斯(Scopus)

摘要

In this paper, the low-complexity hardware architectures of 4×4 forward and inverse transforms with integrated quantizer and dequantizer for H.264 advanced video coders (AVC) are proposed. By applying the regularity of the quantization matrix, the quantization can be merged into transform step, which results in the reduction of the hardware complexity in VLSI implementation. The proposed integrated transforms have been synthesized with TSMC 0.35 μm technology. Simulation results show that it can achieve 256 M samples/sec at 32 MHz in encoder part and 448 M samples/sec at 56 MHz in decoder part, respectively.

原文English
文章編號1464959
頁(從 - 到)1802-1805
頁數4
期刊Proceedings - IEEE International Symposium on Circuits and Systems
DOIs
出版狀態Published - 2005 十二月 1
事件IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan
持續時間: 2005 五月 232005 五月 26

    指紋

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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