Compact model of retention characteristics of ferroelectric FinFET synapse with MFIS gate stack

Md Aftab Baig, Hoang Hiep Le, Sourav De, Che Wei Chang, Chia Chi Hsieh, Xiao Shan Huang, Yao Jen Lee, Darsen D. Lu

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

In this paper, multiple-fin n- and p-channel HfZrO2 ferroelectric-FinFET devices are manufactured using a gate first process with post metalization annealing. The device transfer characteristics upon program and erase operations are measured and modeled. The drift in the transfer characteristics due to depolarization field and charge injection are captured using the shift in the threshold voltage along with time-dependent modeling of vertical field dependent mobility degradation parameters to develop a physical, computationally efficient, and accurate retention model for ferroelectric-FinFET devices. The modeled conductance is incorporated into deep neural network simulation platform CIMulator to analyze the role of conductance drift due to retention degradation, as well as the importance of the gap between high and low conductance states in improving the image recognition accuracy of neural networks.

原文English
文章編號024001
期刊Semiconductor Science and Technology
37
發行號2
DOIs
出版狀態Published - 2022 2月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 凝聚態物理學
  • 電氣與電子工程
  • 材料化學

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