Compact modeling for new transistor structures

C. Hu, M. Dunga, C. H. Lin, Darsen Lu, A. Niknejad

研究成果: Paper

1 引文 (Scopus)

摘要

Using embedded SRAM as a path, FinFET may enter manufacturing at 32nm. FinFET provides several advantages over the planar MOSFET structure-smaller size, larger current, smaller leakage, and less variation in threshold voltage. A compact model of multi-gate transistors will facilitate their adoption. BSIM-MG is a surface-potential based compact model of multi-gate MOSFETs fabricated on either SOI or bulk substrates. The effects of body doping are modeled. It can also model a double-gate transistor with independently biased front and back gates and asymmetric front and back gate work-functions and dielectric thicknesses.

原文English
頁面285-288
頁數4
出版狀態Published - 2007 一月 1
事件12th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2007 - Vienna, Austria
持續時間: 2007 九月 252007 九月 27

Other

Other12th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2007
國家Austria
城市Vienna
期間07-09-2507-09-27

指紋

Transistors
MOSFET
Modeling
Surface Potential
Static random access storage
Surface potential
Threshold voltage
Leakage
Biased
Manufacturing
Voltage
Substrate
Doping (additives)
Model
Path
Substrates
FinFET

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Modelling and Simulation

引用此文

Hu, C., Dunga, M., Lin, C. H., Lu, D., & Niknejad, A. (2007). Compact modeling for new transistor structures. 285-288. 論文發表於 12th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2007, Vienna, Austria.
Hu, C. ; Dunga, M. ; Lin, C. H. ; Lu, Darsen ; Niknejad, A. / Compact modeling for new transistor structures. 論文發表於 12th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2007, Vienna, Austria.4 p.
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Hu, C, Dunga, M, Lin, CH, Lu, D & Niknejad, A 2007, 'Compact modeling for new transistor structures', 論文發表於 12th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2007, Vienna, Austria, 07-09-25 - 07-09-27 頁 285-288.

Compact modeling for new transistor structures. / Hu, C.; Dunga, M.; Lin, C. H.; Lu, Darsen; Niknejad, A.

2007. 285-288 論文發表於 12th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2007, Vienna, Austria.

研究成果: Paper

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Hu C, Dunga M, Lin CH, Lu D, Niknejad A. Compact modeling for new transistor structures. 2007. 論文發表於 12th International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2007, Vienna, Austria.