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Compact models for sub-22nm MOSFETs

  • Y. S. Chauhan
  • , D. D. Lu
  • , S. Venugopalan
  • , M. A. Karim
  • , A. Niknejad
  • , C. Hu

研究成果: Conference contribution

4   連結會在新分頁中打開 引文 斯高帕斯(Scopus)

摘要

FinFET and UTBSOI (or ETSOI) FET are the two promising multi-gate FET candidates for sub-22nm CMOS technology. The BSIM-CMG and BSIM-IMG are the surface potential based physical compact models for multi-gate MOSFETs. The BSIM-CMG model has been developed to model common symmetric double, triple, quadruple and surround gate MOSFET. The BSIM-IMG model has been developed to model independent double-gate MOSFET capturing threshold voltage variation with back gate bias. Both models have been verified by simulation /measurements and show excellent results for all types of real device effects like SCE, DIBL, mobility degradation, poly depletion, QME etc.

原文English
主出版物標題Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
頁面720-725
頁數6
出版狀態Published - 2011
事件Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 - Boston, MA, United States
持續時間: 2011 6月 132011 6月 16

出版系列

名字Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
2

Other

OtherNanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
國家/地區United States
城市Boston, MA
期間11-06-1311-06-16

All Science Journal Classification (ASJC) codes

  • 硬體和架構
  • 電氣與電子工程

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