Controlled misfit dislocation technology in strained silicon MOSFETs

San Lein Wu, Yen Ping Wang, Shoou Jinn Chang

研究成果: Article同行評審

9 引文 斯高帕斯(Scopus)

摘要

In this paper, we report new process integration flows to fabricate strained-Si nMOSFETs having thicker strained-Si grown on a relaxed Si 0.8Ge0.2 virtual substrate. For the same device parameters and process condition, a device with this advanced integration flow (sample B) starting epitaxial strained-Si layers after shallow trench isolation and well implantation is shown having a 70% enhancement in effective electron mobility compared to the Si control device. Devices with conventional process sequences (sample A) exhibit a larger leakage current and up to 50% device failure. The leakage mechanism in sample A due to misfit dislocation-induced leakage paths is clearly demonstrated from the photon emission microscopy (PEM) measurement. Improved characteristics in sample B indicate that devices with new process sequences exhibit controlled misfit dislocations in strained-Si layers and show a greater flexibility for developing high-performance strained-Si CMOS.

原文English
頁(從 - 到)44-47
頁數4
期刊Semiconductor Science and Technology
21
發行號1
DOIs
出版狀態Published - 2006 一月 1

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 凝聚態物理學
  • 電氣與電子工程
  • 材料化學

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