In this work, the synaptic characteristics together with 5 bits (32 states) operation based on polycrystalline-silicon (poly-Si) ferroelectric thin-film transistor (FeTFT) with HfZrO x gate dielectric are demonstrated for the first time. A 1.2 V threshold voltage shift of memory window is obtained. The impacts of pulse time on the potentiation and depression states are studied by a modulation scheme with incremental pulse voltages. The potentiation and depression rates of the conductance (G d) states of FeTFTs are found to be asymmetric and become more severe when increasing the pulse time. In order to realize high recognition rate and accuracy of neuromorphic computing, low asymmetric nonlinearity of potentiation (αp) and depression (αd) of poly-Si FeTFTs can be achieved with the reduction of operation voltage. Low asymmetry αp-αd = 0.71 and high G d ratio ∼40 of FeTFTs are obtained based on the small pulse time of 50 ns and low average potentiation/depression voltages of 2.63/-2.69 V. When the pulse time is increased from 50 to 150 ns, the average potentiation/depression voltages can be further reduced to ∼1.59/-1.69 V for low asymmetry αp-αd = 0.25 due to the enhanced G d potentiation and depression rates, and the G d ratio is also reduced to 9.96 with the reduction of potentiation/depression voltages. The small pulse time and potentiation/depression voltages of FeTFTs are responsible for the polarization switching of the ferroelectric layer following the minor operation-loop. Compared to the depression state, it leads to more stable retention and endurance behavior of the potentiation state due to the different depolarization electric fields.
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