Depth-reliability-based stereo-matching algorithm and its VLSI architecture design

Der Wei Yang, Li Chia Chu, Chun Wei Chen, Jonas Wang, Ming Der Shieh

研究成果: Article同行評審

6 引文 斯高帕斯(Scopus)


A low-complexity depth-reliability-based stereomatching algorithm and an efficient scanline memory-merging implementation scheme are proposed in this paper. The developed algorithm analyzes the accuracy of disparity results by using simple local window-based methods and preserves reliable information only. A bidirectional depth propagation flow is then adopted to fill the unreliable segments by using reliable information. Moreover, a set of predefined function-specific reliability variables are extracted to further improve depth quality in the occluded and smooth regions, which can reduce 39%bad pixels obtained by applying the basic 7 × 7 window-based matching. The proposed scanline memory-merging scheme along with data prefetching can lead to 32.7%savings on the scanline memory area and relax the requirements of external frame buffer size and bandwidth. Experimental results show that the implemented stereo-matching hardware has a gate count of 223 k including the scanline memory, and can achieve up to 70 frames/s for 480×540 resolution (2×2 downsampling of FullHD side-by-side 3-D format) with 56 disparity levels.

頁(從 - 到)1038-1050
期刊IEEE Transactions on Circuits and Systems for Video Technology
出版狀態Published - 2015 六月 1

All Science Journal Classification (ASJC) codes

  • 媒體技術
  • 電氣與電子工程


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