Design and analysis of a CMOS even harmonic mixer with current reuse circuits

Ming Feng Huang, Shuenn Yuh Lee, Chung J. Kuo

研究成果: Paper

2 引文 (Scopus)

摘要

A novel topology for even harmonic mixer (EHM) is presented. This proposed mixer employs a current reuse circuit and a double frequency technique to improve the linearity and isolation problems, respectively. Moreover, theoretical analyses for conversion gain, 1-dB compression point, and 3 rd-order intermodulation point as functions of the circuit bias and technology parameters are derived by Taylor series expansion with short channel current model and verified by experimental data. The measured results reveal that the proposed mixer possesses single-end conversion gain of 9.17 dB, third-order input intercept point (IIP3) of -5.01 dBm, IIP3/DC of 23.69 dBm, and the 2LO-IF and 2LO-RF isolations of 75 dB and 58.33 dB, respectively, under supply voltage of 1.8 V, power consumption of 1.35 mW, and LO power of 5 dBm at 900 MHz.

原文English
頁面269-272
頁數4
出版狀態Published - 2004 十二月 1
事件2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan
持續時間: 2004 十二月 62004 十二月 9

Other

Other2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology
國家Taiwan
城市Tainan
期間04-12-0604-12-09

指紋

Mixer circuits
Intermodulation
Taylor series
Networks (circuits)
Electric power utilization
Topology
Electric potential

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

引用此文

Huang, M. F., Lee, S. Y., & Kuo, C. J. (2004). Design and analysis of a CMOS even harmonic mixer with current reuse circuits. 269-272. 論文發表於 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology, Tainan, Taiwan.
Huang, Ming Feng ; Lee, Shuenn Yuh ; Kuo, Chung J. / Design and analysis of a CMOS even harmonic mixer with current reuse circuits. 論文發表於 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology, Tainan, Taiwan.4 p.
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abstract = "A novel topology for even harmonic mixer (EHM) is presented. This proposed mixer employs a current reuse circuit and a double frequency technique to improve the linearity and isolation problems, respectively. Moreover, theoretical analyses for conversion gain, 1-dB compression point, and 3 rd-order intermodulation point as functions of the circuit bias and technology parameters are derived by Taylor series expansion with short channel current model and verified by experimental data. The measured results reveal that the proposed mixer possesses single-end conversion gain of 9.17 dB, third-order input intercept point (IIP3) of -5.01 dBm, IIP3/DC of 23.69 dBm, and the 2LO-IF and 2LO-RF isolations of 75 dB and 58.33 dB, respectively, under supply voltage of 1.8 V, power consumption of 1.35 mW, and LO power of 5 dBm at 900 MHz.",
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Huang, MF, Lee, SY & Kuo, CJ 2004, 'Design and analysis of a CMOS even harmonic mixer with current reuse circuits', 論文發表於 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology, Tainan, Taiwan, 04-12-06 - 04-12-09 頁 269-272.

Design and analysis of a CMOS even harmonic mixer with current reuse circuits. / Huang, Ming Feng; Lee, Shuenn Yuh; Kuo, Chung J.

2004. 269-272 論文發表於 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology, Tainan, Taiwan.

研究成果: Paper

TY - CONF

T1 - Design and analysis of a CMOS even harmonic mixer with current reuse circuits

AU - Huang, Ming Feng

AU - Lee, Shuenn Yuh

AU - Kuo, Chung J.

PY - 2004/12/1

Y1 - 2004/12/1

N2 - A novel topology for even harmonic mixer (EHM) is presented. This proposed mixer employs a current reuse circuit and a double frequency technique to improve the linearity and isolation problems, respectively. Moreover, theoretical analyses for conversion gain, 1-dB compression point, and 3 rd-order intermodulation point as functions of the circuit bias and technology parameters are derived by Taylor series expansion with short channel current model and verified by experimental data. The measured results reveal that the proposed mixer possesses single-end conversion gain of 9.17 dB, third-order input intercept point (IIP3) of -5.01 dBm, IIP3/DC of 23.69 dBm, and the 2LO-IF and 2LO-RF isolations of 75 dB and 58.33 dB, respectively, under supply voltage of 1.8 V, power consumption of 1.35 mW, and LO power of 5 dBm at 900 MHz.

AB - A novel topology for even harmonic mixer (EHM) is presented. This proposed mixer employs a current reuse circuit and a double frequency technique to improve the linearity and isolation problems, respectively. Moreover, theoretical analyses for conversion gain, 1-dB compression point, and 3 rd-order intermodulation point as functions of the circuit bias and technology parameters are derived by Taylor series expansion with short channel current model and verified by experimental data. The measured results reveal that the proposed mixer possesses single-end conversion gain of 9.17 dB, third-order input intercept point (IIP3) of -5.01 dBm, IIP3/DC of 23.69 dBm, and the 2LO-IF and 2LO-RF isolations of 75 dB and 58.33 dB, respectively, under supply voltage of 1.8 V, power consumption of 1.35 mW, and LO power of 5 dBm at 900 MHz.

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Huang MF, Lee SY, Kuo CJ. Design and analysis of a CMOS even harmonic mixer with current reuse circuits. 2004. 論文發表於 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology, Tainan, Taiwan.