Design and analysis of an interleave controlled series buck converter with low load current ripple

Cai Yang Ko, Tsorng-Juu Liang, Kai Hui Chen, Jiann-Fuh Chen

研究成果: Conference contribution

2 引文 斯高帕斯(Scopus)

摘要

In this paper, a novel high step-down DC-DC converter is proposed. The voltage conversion gain of this converter is Vo/Vin=D 2. By using the interleaved control, the output current ripple is reduced and the transient response is improved. The operating principles and small-signal analysis are discussed. Finally, a laboratory prototype circuit with input voltage 12 V and output 1.5 V / 50 A is implemented to verify the proposed converter.

原文English
主出版物標題Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
頁面672-675
頁數4
DOIs
出版狀態Published - 2010 十二月 1
事件2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia
持續時間: 2010 十二月 62010 十二月 9

出版系列

名字IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
國家/地區Malaysia
城市Kuala Lumpur
期間10-12-0610-12-09

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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