A methodology for the design and analysis of the best fourth-order topology for sigma-delta modulators (SDM) is described. In the determination of stable topology for analysis, theoretical analysis, combined with DC analysis was used to determine the ranges of loop coefficients which stabilize the system, while a numerical analysis was employed to analyze the ranges of loop coefficients. The analysis provided stable regions in the frequency domain from where a set of loop coefficients for VLSI implementation was selected. With this set of coefficients, the results of simulated behavior of fourth-order leapfrog topology indicated the potential application of fourth-order topology to ultra-high resolution signal processing system.
|出版狀態||Published - 1994 十二月 1|
|事件||Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems - Taipei, Taiwan|
持續時間: 1994 十二月 5 → 1994 十二月 8
|Other||Proceedings of the 1994 IEEE Asia-Pacific Conference on Circuits and Systems|
|期間||94-12-05 → 94-12-08|
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering