Design and Implementation of a Novel Multilevel DC-AC Inverter

Cheng Han Hsieh, Tsorng Juu Liang, Shih Ming Chen, Shih Wen Tsai

研究成果: Article同行評審

58 引文 斯高帕斯(Scopus)

摘要

In this paper, a novel multilevel dc-ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals' design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220 Vrms/2 kW is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.

原文English
文章編號7403964
頁(從 - 到)2436-2443
頁數8
期刊IEEE Transactions on Industry Applications
52
發行號3
DOIs
出版狀態Published - 2016 五月 1

All Science Journal Classification (ASJC) codes

  • 控制與系統工程
  • 工業與製造工程
  • 電氣與電子工程

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