Design and implementation of a prioritized packet-processing module on NetFPGA platform

Pang Wei Tsai, Hou Yi Chou, Pei Wen Cheng, Mon Yen Luo, Chu-Sing Yang

研究成果: Conference contribution

摘要

In recent years, varying traffic patterns and evolving applications are urging the Internet revolution. Traditional networking components are hard to achieve perfect condition facing the traffic demands from applications. Hence, Open Flow, a software defined network solution is proposed to gain flexible configuration and dynamic control on networking devices. It provides an opportunity to design mechanisms toward better transmission guarantee. The Open Flow protocol provides multiple actions in packet forwarding process. However, there are few accordant designs in hardware support differentiating or shaping the traffic up to this point. On the other hand, most of the developing methods with complicated control policies in software defined network such as traffic shaping and prioritized packet processing are concentrating only on software-based level. Therefore, this paper proposes a prioritized packet-processing module with offloaded flow control mechanism on to an embedded platform, NetFPGA, with open and programmable networking interface. The implementation enables incoming packets on each port of an Open Flow-enabled switch to be processed according to different priorities. Also, the designed control mechanism focuses on minimizing resource competition among flows, and its policies can be modified by software to dynamically limit the output rate on egress ports. Experiment results show that the prioritized packet-processing module with output rate control mechanism reaches a decent accuracy in both TCP and UDP connections, which provides desired traffic shaping and flow priority functions. This work also provides a prototype solution for differentiating traffic by service demand on networking device in software defined network environment.

原文English
主出版物標題Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013
發行者IEEE Computer Society
頁面272-277
頁數6
ISBN(列印)9780769550886
DOIs
出版狀態Published - 2014 一月 1
事件15th IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 11th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2013 - Zhangjiajie, Hunan, China
持續時間: 2013 十一月 132013 十一月 15

出版系列

名字Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013

Other

Other15th IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 11th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2013
國家China
城市Zhangjiajie, Hunan
期間13-11-1313-11-15

指紋

Processing
Flow control
Switches
Internet
Hardware
Network protocols
Experiments

All Science Journal Classification (ASJC) codes

  • Software

引用此文

Tsai, P. W., Chou, H. Y., Cheng, P. W., Luo, M. Y., & Yang, C-S. (2014). Design and implementation of a prioritized packet-processing module on NetFPGA platform. 於 Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013 (頁 272-277). [6831929] (Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013). IEEE Computer Society. https://doi.org/10.1109/HPCC.and.EUC.2013.47
Tsai, Pang Wei ; Chou, Hou Yi ; Cheng, Pei Wen ; Luo, Mon Yen ; Yang, Chu-Sing. / Design and implementation of a prioritized packet-processing module on NetFPGA platform. Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013. IEEE Computer Society, 2014. 頁 272-277 (Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013).
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Tsai, PW, Chou, HY, Cheng, PW, Luo, MY & Yang, C-S 2014, Design and implementation of a prioritized packet-processing module on NetFPGA platform. 於 Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013., 6831929, Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013, IEEE Computer Society, 頁 272-277, 15th IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 11th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2013, Zhangjiajie, Hunan, China, 13-11-13. https://doi.org/10.1109/HPCC.and.EUC.2013.47

Design and implementation of a prioritized packet-processing module on NetFPGA platform. / Tsai, Pang Wei; Chou, Hou Yi; Cheng, Pei Wen; Luo, Mon Yen; Yang, Chu-Sing.

Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013. IEEE Computer Society, 2014. p. 272-277 6831929 (Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013).

研究成果: Conference contribution

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Tsai PW, Chou HY, Cheng PW, Luo MY, Yang C-S. Design and implementation of a prioritized packet-processing module on NetFPGA platform. 於 Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013. IEEE Computer Society. 2014. p. 272-277. 6831929. (Proceedings - 2013 IEEE International Conference on High Performance Computing and Communications, HPCC 2013 and 2013 IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013). https://doi.org/10.1109/HPCC.and.EUC.2013.47