Design and implementation of an analogue median filter for real-time processing

B. D. Liu, C. S. Tsay, C. H. Chan

研究成果: Article同行評審

5 引文 斯高帕斯(Scopus)

摘要

A new architecture is proposed for analogue median filters; without the high accuracy reference voltage, high speed analogue summer, and linear sawtooth wave generator; therefore it is easy to implement by VLSI technology. The features of this architecture are modular, regular, locally connected and expansible. The throughput is independent of the window size and the hardware complexity is linearly dependent on the window size.

原文English
頁(從 - 到)289-295
頁數7
期刊International Journal of Electronics
75
發行號2
DOIs
出版狀態Published - 1993 八月

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

指紋

深入研究「Design and implementation of an analogue median filter for real-time processing」主題。共同形成了獨特的指紋。

引用此