Design and implementation of an FPGA-based motion command generation chip

Ke Han Su, Chih Kuan Hu, Ming Yang Cheng

研究成果: Conference contribution

8 引文 斯高帕斯(Scopus)

摘要

This study is aimed at developing a motion control command generation chip that can be used to perform acceleration/deceleration motion planning for general point-to-point motion applications. Instead of using the complex polynomial type method, the digital convolution method is adopted to implement trapezoidal and S-curve motion planning. In addition, the Digital Difference Analyzer (DDA) technique is employed to generate the output pulse. Moreover, in order to deal with the error in the number of output pulses when applied to point-to-point motions, a real-time output pulse compensation algorithm is developed to make sure that no output pulse error will occur. This study adopts a programmable hardware structure, in which both the Acc/Dec motion planning and DDA are implemented in an FPGA chip using VHDL for fast hardware verification.

原文English
主出版物標題2006 IEEE International Conference on Systems, Man and Cybernetics
發行者Institute of Electrical and Electronics Engineers Inc.
頁面5030-5035
頁數6
ISBN(列印)1424401003, 9781424401000
DOIs
出版狀態Published - 2006 一月 1
事件2006 IEEE International Conference on Systems, Man and Cybernetics - Taipei, Taiwan
持續時間: 2006 十月 82006 十月 11

出版系列

名字Conference Proceedings - IEEE International Conference on Systems, Man and Cybernetics
6
ISSN(列印)1062-922X

Other

Other2006 IEEE International Conference on Systems, Man and Cybernetics
國家/地區Taiwan
城市Taipei
期間06-10-0806-10-11

All Science Journal Classification (ASJC) codes

  • 工程 (全部)

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