TY - GEN
T1 - Design and implementation of dynamic weighted fuzzy sliding-mode controller for an FPGA-based inverted pendulum car
AU - Li, Jeng Hann
AU - Li, T. H.S.
AU - Tsai, Meng Che
AU - Lin, Sheng Hsiung
N1 - Publisher Copyright:
© 2003 IEEE.
PY - 2003
Y1 - 2003
N2 - This paper presents the fuzzy logic control (FLC) design with the FPGA chip and the complete control system implementation of the inverted pendulum car (IPC). At first, a dynamic weighted fuzzy sliding-mode control (DWFSMC) scheme is proposed to upright the pole of the IPC. The simulation results show the effectiveness of the developed control algorithm. The architecture of the DWFSMC is integrated on an Altera FPGA chip employing the fuzzy singleton inference machine with a membership function generator. The proposed FPGA chip mainly includes four parts: digital filter, 4x decoding circuit, DWFSMC, and pulse width modulation (PWM) fitness module. A nonlinear plant of IPC system is designed and established to examine the performances of the proposed FLC chip. The setup of the IPC is also addressed. The real-time experiments demonstrate the proposed DWFSMC can successfully balance the pole of the FPGA-based IPC.
AB - This paper presents the fuzzy logic control (FLC) design with the FPGA chip and the complete control system implementation of the inverted pendulum car (IPC). At first, a dynamic weighted fuzzy sliding-mode control (DWFSMC) scheme is proposed to upright the pole of the IPC. The simulation results show the effectiveness of the developed control algorithm. The architecture of the DWFSMC is integrated on an Altera FPGA chip employing the fuzzy singleton inference machine with a membership function generator. The proposed FPGA chip mainly includes four parts: digital filter, 4x decoding circuit, DWFSMC, and pulse width modulation (PWM) fitness module. A nonlinear plant of IPC system is designed and established to examine the performances of the proposed FLC chip. The setup of the IPC is also addressed. The real-time experiments demonstrate the proposed DWFSMC can successfully balance the pole of the FPGA-based IPC.
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U2 - 10.1109/AIM.2003.1225167
DO - 10.1109/AIM.2003.1225167
M3 - Conference contribution
AN - SCOPUS:33744968053
T3 - IEEE/ASME International Conference on Advanced Intelligent Mechatronics, AIM
SP - 628
EP - 633
BT - Proceedings - 2003 IEEE/ASME International Conference on Advanced Intelligent Mechatronics, AIM 2003
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2003 IEEE/ASME International Conference on Advanced Intelligent Mechatronics, AIM 2003
Y2 - 20 July 2003 through 24 July 2003
ER -