TY - GEN
T1 - Design and Implementation of Interleaved Flyback Converter with GaN E-HEMT
AU - Cheng, Jui Wen
AU - Liang, Tsorng Juu
AU - Liao, Kuo Fu
AU - Chen, Kai Hui
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - High efficiency, high power density, and small size has become the development trend of power converters. In this paper, an interleaved flyback DC-DC converter with wide input voltage range with the GaN high electron mobility transistor (HEMT) is implemented for achieving high power density. The interleaved flyback converter inherent with leakage energy recycle function can reduce the output current ripple to improve efficiency which is suitable for 1 MHz operation. In this paper, the operating principle and the steady-state characteristics of the interleaved flyback converter are analyzed. Also, the gate driver circuits design of GaN are discussed. Finally, an interleaved flyback converter with 1 MHz switching frequency laboratory prototype is implemented with input voltage range 72 V to 240 V, output voltage of 24 V, rated power of 144 W. In addition, the synchronous rectifiers are used at secondary side to reduce conduction loss for higher efficiency to verify the theoretical analysis. The experimental results show that the highest efficiency is 84.1% at 50%load with the input voltage of 72 V.
AB - High efficiency, high power density, and small size has become the development trend of power converters. In this paper, an interleaved flyback DC-DC converter with wide input voltage range with the GaN high electron mobility transistor (HEMT) is implemented for achieving high power density. The interleaved flyback converter inherent with leakage energy recycle function can reduce the output current ripple to improve efficiency which is suitable for 1 MHz operation. In this paper, the operating principle and the steady-state characteristics of the interleaved flyback converter are analyzed. Also, the gate driver circuits design of GaN are discussed. Finally, an interleaved flyback converter with 1 MHz switching frequency laboratory prototype is implemented with input voltage range 72 V to 240 V, output voltage of 24 V, rated power of 144 W. In addition, the synchronous rectifiers are used at secondary side to reduce conduction loss for higher efficiency to verify the theoretical analysis. The experimental results show that the highest efficiency is 84.1% at 50%load with the input voltage of 72 V.
UR - https://www.scopus.com/pages/publications/85162241155
UR - https://www.scopus.com/pages/publications/85162241155#tab=citedBy
U2 - 10.1109/APEC43580.2023.10131244
DO - 10.1109/APEC43580.2023.10131244
M3 - Conference contribution
AN - SCOPUS:85162241155
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 2474
EP - 2480
BT - APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023
Y2 - 19 March 2023 through 23 March 2023
ER -