Design and implementation of sigma-delta DPWM controller for switching converter

Pui Kei Leong, Chun Hung Yang, Chi Wai Leng, Chien Hung Tsai

研究成果: Conference contribution

15 引文 斯高帕斯(Scopus)

摘要

This paper describes the complete design and implementation of a low-power sigma-delta DPWM (Σ-Δ DPWM) controller for switching converter which can operate at a very high frequency. In the previous design approach, the effective resolution of Σ-Δ DPWM, i.e. the effective number of bit (ENOB) is over-estimated by using the conventional signal-to-noise ratio (SNR) with a continuous-time sine-wave input. Therefore, the modified expressions of SNR and ENOB are presented, which are suitable for the digital sigma-delta modulator (Σ-Δ MOD) with a discrete-time discrete-amplitude signal. In addition, the trade off between the hardware area consumption and the SNR value is discussed. Finally, the system simulation results of the general 10-b DPWM controller and 10-b effective resolution ΣΔ DPWM controller for buck converter are shown to verify the proposed design approach

原文English
主出版物標題2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
頁面3074-3077
頁數4
DOIs
出版狀態Published - 2009 十月 26
事件2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
持續時間: 2009 五月 242009 五月 27

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

Other

Other2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
國家/地區Taiwan
城市Taipei
期間09-05-2409-05-27

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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