Design and performance analysis for the Multimedia Function Unit of the NSC-98 CPU

Jin Fu Ueng, I. Chen Wu, Y. H. Kuo, Ling Yuan Kao, Chao Lieh Chen, Yi Jai Huang, Sheng Yuan Lin, Chien Hua Hsu

研究成果: Paper同行評審

2 引文 斯高帕斯(Scopus)

摘要

Leveraging Taiwan's hardware technologies, National Science Council in Taiwan proposed a project to design an advanced CPU, called NSC-98, compatible to the Intel MMX architecture. This paper discusses the design of multimedia extension, called MFU (Multimedia Function Unit), in this CPU. The MFU has the following two special features. (1) Support three more instructions for permutation operations, parallel distance operations, and parallel average operations; (2) implement two MFU subunits: one without the parallel multiplier and the other without the parallel shifter and converter (for permutation). This paper also does performance analysis by estimating the performances of the MFU with and without these features, on some chosen multimedia benchmarks. These performance analysis results can justify our MFU design.

原文English
頁面1513-1517
頁數5
出版狀態Published - 1997
事件Proceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3) - Singapore, Singapore
持續時間: 1997 九月 91997 九月 12

Other

OtherProceedings of the 1997 1st International Conference on Information, Communications and Signal Processing, ICICS. Part 3 (of 3)
城市Singapore, Singapore
期間97-09-0997-09-12

All Science Journal Classification (ASJC) codes

  • 訊號處理

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