Design of a dual-mode NoC router integrated with network interface for AMBA-based IPs

Shih Hsun Hsu, Yu Xuan Lin, Jer Min Jou

研究成果: Paper同行評審

9 引文 斯高帕斯(Scopus)

摘要

Networks-on-a-chip (NoC) is a new architectural template, which helps to meet many of challenges of designing a complex system-on-a-chip (SoC). In the paper, we introduce the on-chip network of and propose the dual-mode router for NoC which provides both guaranteed and best-effort communication services. We adopt the recording table for circuit switching to support the guaranteed service, and in order to sufficiently utilize the bandwidth of the network we add the wormhole switching which contains several virtual channels. Additionally, our router integrates the standard interface with AMBA AHB for easier integration of the intellectual properties (IPs) of NoC. The benchmark router with 5 32-bit ports can operate at 100MHz and the bandwidth per link of the router can be up to 3.2Gbps. The performance of the router is enough for providing an HDTV application on NoC.

原文English
頁面211-214
頁數4
DOIs
出版狀態Published - 2006 十二月 1
事件2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China
持續時間: 2006 十一月 132006 十一月 15

Other

Other2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
國家China
城市Hangzhou
期間06-11-1306-11-15

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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