Design of a Dynamic Parallel Execution Architecture for Multi-core Systems

Shiang Huang, Jer-Min Jou, Cheng Hung Hsieh, Ding Yuan Lin

研究成果: Chapter

摘要

In this paper, a new dynamic Parallel Execution Architecture, DEAL, which can execute the dynamic parallel threads and handle the dynamically incorrect data access caused by parallel execution threads efficiently, is proposed. DEAL combines the concept of multi-thread speculation with the transactional memory into a new model and then threads can be efficiently executed in parallel in it. DEAL can detect incorrect parallel data access immediately and resolve them to keep data consistent among threads and ensure the threads do not violate the data dependences during parallel execution dynamically. Based on experimental results, we find that the performance of parallel applications running in DEAL can be significantly faster, 1.4 speed-ups at least, than those running in sequential, which demonstrated that the DEAL can execute parallel threads and manage data and resolve incorrect data access among them efficiently.

原文English
主出版物標題Advances in Intelligent Systems and Applications - Volume 2
主出版物子標題Proceedings of the International Computer
編輯Chang Ruay-Shiung, Peng Sheng-Lung, Lin Chia-Chen
頁面731-740
頁數10
DOIs
出版狀態Published - 2013 六月 28

出版系列

名字Smart Innovation, Systems and Technologies
21
ISSN(列印)2190-3018
ISSN(電子)2190-3026

指紋

Parallel architectures
Computer systems
Data storage equipment
Thread

All Science Journal Classification (ASJC) codes

  • Decision Sciences(all)
  • Computer Science(all)

引用此文

Huang, S., Jou, J-M., Hsieh, C. H., & Lin, D. Y. (2013). Design of a Dynamic Parallel Execution Architecture for Multi-core Systems. 於 C. Ruay-Shiung, P. Sheng-Lung, & L. Chia-Chen (編輯), Advances in Intelligent Systems and Applications - Volume 2: Proceedings of the International Computer (頁 731-740). (Smart Innovation, Systems and Technologies; 卷 21). https://doi.org/10.1007/978-3-642-35473-1_72
Huang, Shiang ; Jou, Jer-Min ; Hsieh, Cheng Hung ; Lin, Ding Yuan. / Design of a Dynamic Parallel Execution Architecture for Multi-core Systems. Advances in Intelligent Systems and Applications - Volume 2: Proceedings of the International Computer. 編輯 / Chang Ruay-Shiung ; Peng Sheng-Lung ; Lin Chia-Chen. 2013. 頁 731-740 (Smart Innovation, Systems and Technologies).
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Huang, S, Jou, J-M, Hsieh, CH & Lin, DY 2013, Design of a Dynamic Parallel Execution Architecture for Multi-core Systems. 於 C Ruay-Shiung, P Sheng-Lung & L Chia-Chen (編輯), Advances in Intelligent Systems and Applications - Volume 2: Proceedings of the International Computer. Smart Innovation, Systems and Technologies, 卷 21, 頁 731-740. https://doi.org/10.1007/978-3-642-35473-1_72

Design of a Dynamic Parallel Execution Architecture for Multi-core Systems. / Huang, Shiang; Jou, Jer-Min; Hsieh, Cheng Hung; Lin, Ding Yuan.

Advances in Intelligent Systems and Applications - Volume 2: Proceedings of the International Computer. 編輯 / Chang Ruay-Shiung; Peng Sheng-Lung; Lin Chia-Chen. 2013. p. 731-740 (Smart Innovation, Systems and Technologies; 卷 21).

研究成果: Chapter

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Huang S, Jou J-M, Hsieh CH, Lin DY. Design of a Dynamic Parallel Execution Architecture for Multi-core Systems. 於 Ruay-Shiung C, Sheng-Lung P, Chia-Chen L, 編輯, Advances in Intelligent Systems and Applications - Volume 2: Proceedings of the International Computer. 2013. p. 731-740. (Smart Innovation, Systems and Technologies). https://doi.org/10.1007/978-3-642-35473-1_72